[SI-LIST] Re: Damping of Cavity-Mode Resonances in PCB
- From: Cristian Gozzi <cristian.gozzi@xxxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>
- Date: Wed, 23 Nov 2011 11:41:10 +0100
I'll use return path vias
I forgot to read Scott's email
Thanks again
Cris
2011/11/22 steve weir <weirsi@xxxxxxxxxx>
> Cristian, if you have something like this:
>
> ----- | Digital Signal
> ----| | |--------- Digital Common
> ----| | |--------- Analog Common
> ( (| | |)) ) ) )
> ----| | |--------- Digital Common
> |----------- Digital Signal
>
> then you have a capacitor between the commons. Any high frequency
> voltage difference, IE noise couples straight from plate to plate. Any
> penetrations through the cavity will excite it as shown. You can
> mitigate the excitement by providing return path vias in addition to the
> signal vias. See Scott's message.
>
> Steve.
>
>
> On 11/22/2011 10:49 AM, Cristian Gozzi wrote:
> > my 2 GND are coupling only in Z direction in my stackup
> > My guess is: if I cannot use buried VIAs and I only have PTH VIAs, in
> this
> > case I cannot avoid coupling between digital signal to these resonance
> > modes, right?
> >
> > Of course the best solution is to avoid PTH VIAs, but just in case I
> > cannot, what is the solution?
> >
> > just by working on plane shapes and dielectric thickness?
> >
> > I'm wondering if I forgot other techniques
> >
> > Cheers
> > Cris
> >
> >
> >
> > 2011/11/22 steve weir<weirsi@xxxxxxxxxx>
> >
> >> There are a couple of approaches to this situation. First, plate
> >> capacitor coupling makes it impossible to isolate facing polygons at
> high
> >> frequency. So, if you really need isolated analog and digital commons,
> >> then you will need to isolate them in the X-Y plane. But first you
> should
> >> examine your system architecture carefully to determine you actually
> need a
> >> separate analog common in your backplane.
> >>
> >> Steve.
> >>
> >>
> >>
> >> On 11/22/2011 9:51 AM, Cristian Gozzi wrote:
> >>
> >> Hi folks
> >>
> >> thanks to everybody for your feedback
> >>
> >> Let me describe better my application!
> >>
> >> I have a backplane with one Digital_GND over one Analog_GND
> >>
> >> of course these 2 nets are separated each others, but due to big plane
> >> shape dimension I got resonance modes starting from 220 MHz
> >>
> >> I don't think I can use decoupling capacitor in this case, so I guess I
> >> can only work with plane shape dimension and dielectric thickness
> >>
> >> My idea is to move/shift at higher frequency these modes.
> >> I don't want to couples these low frequency modes to digital signals
> that
> >> operates at 400-800 Mbps
> >>
> >> Thanks for any further comments
> >>
> >> Regards
> >> Cris
> >>
> >> 2011/11/21 Brad Brim<bradb@xxxxxxxxxxx>
> >>
> >>> hi Steve,
> >>>
> >>> I did not say it failed to dampen a resonance, I only said it does not
> >>> serve
> >>> to eliminate the resonance. I am familiar with Chris's applications
> and in
> >>> many cases he may not be able to apply the commercially available thin
> >>> dielectrics, let alone one less than 5um thickness, as cited from
> Istvan's
> >>> paper. Our comments are each equally correct and equally applicable to
> >>> Chris.
> >>>
> >>> cheers,
> >>> -Brad
> >>>
> >>>> -----Original Message-----
> >>>> From: si-list-bounce@xxxxxxxxxxxxx
> >>>> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of steve weir
> >>>> Sent: Monday, November 21, 2011 12:03 PM
> >>>> To: si-list@xxxxxxxxxxxxx
> >>>> Subject: [SI-LIST] Re: Damping of Cavity-Mode Resonances in PCB
> >>> >
> >>>> Brad, thin dielectrics most definitely do suppress cavity
> >>>> modal resonances. They do so by reducing the Q. Inductance
> >>>> goes down, but skin resistance remains fixed, and for any dK
> >>>> and tangent loss coefficient dielectric loss increases.
> >>>> There are a number of papers out there that show these
> >>>> characteristics. Istvan published a paper circa
> >>>> 2004 that showed for dK of 4 and tangent loss of 0.02 that
> >>>> around 0.1 -
> >>>> 0.2 mils thickness, cavity Q falls to one. Already having
> >>>> served its
> >>>> primary purpose, an empty beer can still makes a terrific
> >>>> resonant cavity, very thin cavities are quite another matter.
> >>>>
> >>>> Best Regards,
> >>>>
> >>>>
> >>>> Steve.
> >>>> On 11/21/2011 11:42 AM, Brad Brim wrote:
> >>>>> hi Chris,
> >>>>>
> >>>>> By "cavity modes" do you mean power plane resonances? If
> >>>> so, is your
> >>>>> objective to (a) drive down device impedance, (b) drive down
> >>>>> emissions, (c) both? Is your goal to only change plane shapes,
> >>>>> stackup, etc. or are you also able to modify decap/emicap
> >>>> placement and selection?
> >>>>> You cannot eliminate all resonance from a plane cavity of
> >>>> electrically
> >>>>> large size with only shape or stackup changes. The modes will have
> >>>>> different spatial distribution as you change the shape but
> >>>> you cannot eliminate them.
> >>>>> As you remove plane cavity area you will reduce spectral
> >>>> mode density.
> >>>>> The big question is how much plane cavity are you able to
> >>>> eliminate?
> >>>>> Using thinner dielectrics does nothing to eliminate resonances. It
> >>>>> certainly raises capacitance but its most significant
> >>>> contribution is
> >>>>> to reduce inductance (not just for spreading but also for
> >>>> mounting caps).
> >>>>> If you are trying to eliminate resonances by adding caps it is
> >>>>> interesting to note that the best solution is not a
> >>>> sequential process
> >>>>> such as: (1) simulate to find the first resonance peak, (2)
> >>>> add a cap
> >>>>> near the resonance peak, repeat (1-2). This process yields reduced
> >>>>> resonances. But if you are able to add multiple caps
> >>>> simultaneously by
> >>>>> considering broadband impedance across the entire PDN, then
> >>>> you find
> >>>>> better solutions with a smaller set of caps.
> >>>>>
> >>>>> cheers,
> >>>>> -Brad
> >>>>> Sigrity
> >>>>>
> >>>>>> -----Original Message-----
> >>>>>> From: si-list-bounce@xxxxxxxxxxxxx
> >>>>>> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Cristian Gozzi
> >>>>>> Sent: Monday, November 21, 2011 7:52 AM
> >>>>>> To: si-list@xxxxxxxxxxxxx
> >>>>>> Subject: [SI-LIST] Damping of Cavity-Mode Resonances in PCB
> >>>>>>
> >>>>>> Hi SI expert
> >>>>>> I'm looking for a good article/paper that describe techniques to
> >>>>>> reduce or suppress cavity modes in PCB, just by working on plane
> >>>>>> shape dimension, pwr to gnd dilectric thickness etc.
> >>>>>>
> >>>>>> Thanks in advance for your suggestion
> >>>>>>
> >>>>>> regards
> >>>>>> Cris
> >>>>>>
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> >>>>
> >>>> --
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> >>
> >> --
> >> Steve Weir
> >> IPBLOX, LLC
> >> 150 N. Center St. #211
> >> Reno, NV 89501 www.ipblox.com
> >> (775) 299-4236 Business(866) 675-4630 Toll-free(707) 780-1951 Fax
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> >>
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> --
> Steve Weir
> IPBLOX, LLC
> 150 N. Center St. #211
> Reno, NV 89501
> www.ipblox.com
>
> (775) 299-4236 Business
> (866) 675-4630 Toll-free
> (707) 780-1951 Fax
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