Cristian there are papers by Istvan Novak and his team as well as the folks for IST Missouri. The three things that you can do with cavities are: Make the polygons big, make the dielectric thin, use high tangent loss material. Steve On 11/21/2011 7:51 AM, Cristian Gozzi wrote: > Hi SI expert > I'm looking for a good article/paper that describe techniques to reduce or > suppress cavity modes in PCB, > just by working on plane shape dimension, pwr to gnd dilectric thickness > etc. > > Thanks in advance for your suggestion > > regards > Cris > > > ------------------------------------------------------------------ > To unsubscribe from si-list: > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field > > or to administer your membership from a web page, go to: > //www.freelists.org/webpage/si-list > > For help: > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > > > List technical documents are available at: > http://www.si-list.net > > List archives are viewable at: > //www.freelists.org/archives/si-list > > Old (prior to June 6, 2001) list archives are viewable at: > http://www.qsl.net/wb6tpu > > > -- Steve Weir IPBLOX, LLC 150 N. Center St. #211 Reno, NV 89501 www.ipblox.com (775) 299-4236 Business (866) 675-4630 Toll-free (707) 780-1951 Fax ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu