Dear Ivor, What is the justification for not having simulated this design? To my understanding for DDR2 topologies, it is usually necessary to = obtain accurate models (for Controller, DDR2 SDRAMs as well as interconnect elements) and to simulate the DQ, DQS (for Read and Write modes), the Clock and=20 Control lines. Careful examination of signal quality and timing budgets would then lead to conclusions regarding acceptability or need for any changes in = the design. Best Regards, Abe Riazi ServerWorks=20 =20 -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] = On Behalf Of Ivor Bowden Sent: Wednesday, February 22, 2006 3:22 PM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] DDR2 design Hi SI Experts, I am reviewing a layout for an embedded DDR2 design using 4 Micron DDR2=20 chips with an Altera Cyclone controller. The memory is set up to be 64=20 bits wide, 16 bits per chip. The target rate is 167MHz. The design is not simulated. Termination is as follows: ODT may be supported, still investigating. There is no series term. There is 0.9V stub term for control lines. There is a differential 100 ohm term for each clock pair (4 total). Routing is as follows: Control lines are daisy chained and length matched between the first=20 DRAM and controller (about 1"), each DRAM (about .75") and the last DRAM = and terminators (about .25"); total net length is about 3.5". Data lines = are length matched at about 3" (controller to DRAM). Clock lines are length matched at about 4" (controller to DRAM). Trace impedance is targeted at = 100 ohms for clock and control lines, and=20 75 ohms for data lines. Is this design likely to work? If not, what changes should be = considered? I very much appreciate all comments. Thank you! Ivor Bowden Engineer Curtiss-Wright Controls =20 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu