[SI-LIST] How to properly simulate signal integrity across PCBs interconnected by Flex?

  • From: "jeanpierrepoulin" <jeanpierrepoulin@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Fri, 31 Aug 2007 20:03:31 -0000

Hello Gurus,

I am attempting to correctly design the first time a system 
consisting of five small PCBs interconnected by short (1-5 inch) Flex 
cable.  While most signals are single ended and of moderate speed (20-
80 Mhz and with most edges controlled by the driving strength of FPGA 
drivers), I am particularly concerned about some clock signals that I 
need to spread to all these PCBs and wish to properly simulate...

1. Is there a flex connector vendor in particular that publishes 
quality IBIS model the simulating software will need?

2. What simulating software do you recommend as easiest to use for 
this type of need?

3. Do you think usage of Flex cabling in this fashion would cause  
problems during FCC certification?

4. Any good web site / publication you've seen on the subject of 
signal integrity across Flex cabling?

Any hint you could offer is greatly appreciated!!

   Jean-Pierre Poulin

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