[SI-LIST] Re: How to properly simulate signal integrity across PCBs interconnected by Flex?
- From: "Curt McNamara" <CurtM@xxxxxxxxxxx>
- To: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Tue, 4 Sep 2007 12:20:40 -0500
I considered this a systems level question (are there significant issues
around bussing a clock to multiple boards). My answer was based on this,
and reflects practical experience designing, testing, and debugging such
systems. If Jean-Pierre can re-think the design to keep clocks off the
cables he will have an easier time of it.
As I and others have noted, flex cable interfaces can be designed to
accommodate high speed signals. It has been my experience that the fewer
of these you have the better.=20
Curt
Curt McNamara, P.E. // senior electrical engineer=20
Logic Product Development
411 Washington Ave. N. Suite 400
Minneapolis, MN 55401
T // 612.436.5178
F // 612.672.9489
www.logicpd.com=20
/ / / / / / / / / / / / / / / / / / / / / / / / /=20
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-----Original Message-----
From: Loyer, Jeff [mailto:jeff.loyer@xxxxxxxxx]=20
Sent: Tuesday, September 04, 2007 9:43 AM
To: Curt McNamara; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: How to properly simulate signal integrity
across PCBs interconnected by Flex?
Curt,
Can I get some clarification on your reluctance to run clocks across
flex? I don't know why a 2 layer flex (L1 =3D GND, L2 =3D signal; thin, =
say
3 mil, dielectric between them) would cause emission problems.
Similarly, would a single layer co-planar design have horrible
emissions? (I don't have experience with co-planar designs, but my
understanding of the basic physics says it wouldn't have exorbitant
emissions).
Pointers to data would be appreciated.
Nice article - thanks for that pointer.
Thanks,
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Curt McNamara
Sent: Friday, August 31, 2007 3:37 PM
To: jeanpierrepoulin@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: How to properly simulate signal integrity across
PCBs interconnected by Flex?
The answer to shipping clocks across flex:
Don't do it if possible. Reconsider the system, perhaps distributed
clocking would work, or even clock recovery from data. If you absolutely
had to ship clock across flex, do it differentially on two layer flex.
Next best would probably be two layer flex with ground plane under clock
and really slow clock edges.
Yes, it is likely to cause problems with emissions.
Curt
Some basics on flex:
http://connectorwizard.com/reference/articles/pdfs/flex_webinar.pdf
Curt McNamara, P.E. // senior electrical engineer=3D20
Logic Product Development
411 Washington Ave. N. Suite 400
Minneapolis, MN 55401
T // 612.436.5178
F // 612.672.9489
www.logicpd.com=3D20
/ / / / / / / / / / / / / / / / / / / / / / / / /=3D20
This message (including any attachments) contains confidential
information intended for a specific individual and purpose, and is
protected by law. If you are not the intended recipient, you should
delete this message and are hereby notified that any disclosure,
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-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of jeanpierrepoulin
Sent: Friday, August 31, 2007 3:04 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] How to properly simulate signal integrity across PCBs
interconnected by Flex?
Hello Gurus,
I am attempting to correctly design the first time a system=3D20
consisting of five small PCBs interconnected by short (1-5 inch) =
Flex=3D20
cable. While most signals are single ended and of moderate speed (20-
80 Mhz and with most edges controlled by the driving strength of =
FPGA=3D20
drivers), I am particularly concerned about some clock signals that =
I=3D20
need to spread to all these PCBs and wish to properly simulate...
1. Is there a flex connector vendor in particular that publishes=3D20
quality IBIS model the simulating software will need?
2. What simulating software do you recommend as easiest to use for=3D20
this type of need?
3. Do you think usage of Flex cabling in this fashion would cause =3D20
problems during FCC certification?
4. Any good web site / publication you've seen on the subject of=3D20
signal integrity across Flex cabling?
Any hint you could offer is greatly appreciated!!
Jean-Pierre Poulin
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