[SI-LIST] Re: How to properly simulate signal integrity across PCBs interconnected by Flex?
- From: Scott McMorrow <scott@xxxxxxxxxxxxx>
- To: mkotson@xxxxxxxxxxx
- Date: Tue, 04 Sep 2007 15:13:48 -0400
To follow up with what Mike says, just because the manufacturer specs a
high loss tangent does not make it so. If you want to know what your
material is doing, you need to measure it. Pyralux FR is specified with
an incredibly high loss tangent. It actually measures at better than
30% less loss, and can easily be used for 10G interfaces.
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC
Kotson, Michael wrote:
> Hi Jean-Pierre,
> We regularly use flex cables in our designs which must be qualified
> for MIL-STD EMI levels (much tougher than FCC), so I really don't think
> you will have much issue. Follow the same design guidelines that you
> would for a rigid PCB (continuous return path, minimize reflections,
> etc). Samtec does a great job of providing spice connector models for
> flex-type connectors. Most any simulation package will handle this kind
> of scenario, but I personally use Hyperlynx due to its simplicity. One
> word of caution however, polyimide (the dielectric used to make flex
> circuits) can be _VERY_ lossy at higher frequencies. Always check the
> loss tangent of the polyimide manufacturer you plan to use, as I've seen
> a wide range in this number from various manufacturers.
>
> Best of luck to you,
> -Mike
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of jeanpierrepoulin
> Sent: Friday, August 31, 2007 2:04 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] How to properly simulate signal integrity across PCBs
> interconnected by Flex?
>
> Hello Gurus,
>
> I am attempting to correctly design the first time a system=20
> consisting of five small PCBs interconnected by short (1-5 inch) Flex=20
> cable. While most signals are single ended and of moderate speed (20-
> 80 Mhz and with most edges controlled by the driving strength of FPGA=20
> drivers), I am particularly concerned about some clock signals that I=20
> need to spread to all these PCBs and wish to properly simulate...
>
> 1. Is there a flex connector vendor in particular that publishes=20
> quality IBIS model the simulating software will need?
>
> 2. What simulating software do you recommend as easiest to use for=20
> this type of need?
>
> 3. Do you think usage of Flex cabling in this fashion would cause =20
> problems during FCC certification?
>
> 4. Any good web site / publication you've seen on the subject of=20
> signal integrity across Flex cabling?
>
> Any hint you could offer is greatly appreciated!!
>
> Jean-Pierre Poulin
>
>
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