[SI-LIST] Re: Ground, the preferred reference plane

  • From: "Michael J. Degerstrom" <degers@xxxxxxxxxxxxxxxxxxxx>
  • To: chris.cheng@xxxxxxxxxxxx
  • Date: Wed, 11 Dec 2002 17:47:16 -0600

Chris,

ECL (not-PECL) I/O  pulled current from VCCO (zero volts) on the driver side 
and dumped it to VTT (-2 volts) through a 50 ohm load on the board.  This was 
the most common  high-speed configuration.  Therefore it was best for the 
signals to reference the ground planes and for the VTT plane to have a low 
impedance to ground in the area of the terminators.  However, signals 
referencing VEE or VTT planes never seemed to cause any trouble.

In general, I usually am not concerned with which planes are used for signal 
reference - as long as the planes offer a low impedance to the ground plane.  
If you have a design without the luxury of metal layers available for full 
power and ground planes then I tend to analyze the problem more carefully.

The topic above deals with the subject of providing return current paths for 
your signal lines.  For this case the term 'reference' relates to the spacing 
of the power/ground planes that set the characteristic impedance of the 
signal lines.  The other topic related to this thread is pertaining to 
whether your circuits are best ground referenced or instead referenced to 
another supply.  I tend to think that this other subject relates to noise 
coupling from other devices that are 'electrically' near your circuit.  

Generally it makes sense to not deviate from ground references unless that is 
typical for the I/O type that you are designing with.  In one design, I ran a 
10Gbps E/O part positive which greatly simplified this design.  However, 
testing of eye diagrams was difficult as the path through the signal lines 
and their terminations allowed low freq harmonics of a DC-DC converter to 
pass into the high speed part.  Also, since the signals were no longer ground 
referenced I had to be creative in order to test the parts with an 
oscilloscope.  I can imagine other scenarios where changing voltage 
references from their typical values would cause a circuit to fail due to 
coupled noise, bias point shifts, etc.

One last point, many packages have grounded metal lids, heatsinks and so on.  
It probably isn't a good idea to shift the supplies so that large areas of 
exposed metal are not at ground potential.  It would be too easy to cause DC 
shorts during handling of the board.

Mike


On Wednesday 11 December 2002 03:59 pm, Chris Cheng wrote:
> Actually there are definite preference on reference plane depending on
> which I/O technology you choose.
> For those old enough to worked on the original ECL (which I am not), the
> prefered reference is the -ve plane not the ground plane. There are a lot
> of open drain I/O's (GTL, ECL to name a few) where the prefer return is the
> voltage the driver's source is tied to. It just happened when Bill Gunning
> started working on GTL he chose to use open drain pull down to ground (to
> save power) and from that point on most of the computers in this world
> start using GTL i/o and thus it makes sense to use ground plane as a
> reference for i/o. Most of the currently so called PECL circuits are
> shifted up open emitters and technically they should be referenced to the
> power plane rather than ground for their return. We are just looking the
> other way and assuming they are perfect differential signals and thus only
> need to reference themselves (+ve vs. -ve), in reality that is not
> completely ture.
>
>
>
> -----Original Message-----
> From: Loyer, Jeff [mailto:jeff.loyer@xxxxxxxxx]
> Sent: Wednesday, December 11, 2002 12:49 PM
> To: Anand.Kuriakose@xxxxxxx
> Cc: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Ground, the preferred reference plane
>
>
>
> This has been discussed in great length in this forum.  The archives =
> should have tons of information on it. =20
>
> My short take: the most prevalant cause of problems is changing the =
> reference plane without providing a suitable means for the return =
> current to transition between the planes.  There is much question about =
> what a "suitable means" is - at what frequencies do "stitching caps" =
> become useless, for instance. =20
>
> Since most chips have the signals referenced to ground internally, it is =
> a safer thing to have your signals likewise referenced to ground =
> externally.  This generally applies to cards, also.
>
> In short, it is possible to reference your signals to any plane, but =
> using ground as the reference plane is a safer bet.  An exception might =
> be if a chip specified that their signals were referenced to a power =
> plane, but I haven't seen this.
>
> Jeff Loyer
>
>
>
> -----Original Message-----
> From: Kuriakose, Anand [mailto:Anand.Kuriakose@xxxxxxx]
> Sent: Wednesday, December 11, 2002 12:25 AM
> To: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] Ground, the preferred reference plane
>
>
>
> Hi All,
>
> In "High Speed Digital System Design" by Stephen Hall, it is mentioned  =
> that
> the ground-referenced signals have cleaner signal integrity when =
> compared to
> power-referenced signals.=20
>
> Chipset design guides (not all) also recommend to have the high speed
> signals like processor signals routed over ground plane rather than over
> power plane. Also similar statements are made in a few other docs.
>
> I'd like to understand how does it improve the signal integrity of the
> signal when routed over GND plane rather than over power plane. In
> otherwords, what makes GND plane the preffered reference plane?
>
> One other point is that when signals are routed over power planes, the
> return current can get back to where it started without passing through =
> any
> decoupling caps, making the return loop smaller (assuming that signals =
> do
> not cross splits in the plane and no return path discontinuity due to =
> layer
> changes). However, if the same signal is routed over GND plane, the =
> return
> current will have to pass through a decoupling cap to complete the loop.
> Correct me if i am wrong in my above point.=20
>
> Regards,
> Anand.
>
>
>
>
>
>
>
>
>
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