The discussion over reference plane has evolved into several discussions points. I will hear try to seperate and make some very short points. 1. The trace as an unbalanced transmission line has a "reference plane" 2. The receiver termination should be referenced to a "reference". This has two parts: a. DC: the reference voltage for thresholding the signal at the mid point of its "high" and "low" voltages. b. AC/HF: the "reference plane" of the transmission line. 3. The driver should be referenced to a "reference". a. DC: the reference voltage for thresholding the signal at the mid point of its "high" and "low" voltages. b. AC/HF: the "reference plane" of the transmission line. -- Regards, __________ James G Roberts /___ ____ | jrobert@xxxxxxxxxxxxxxxxxxxxx Jim __ / /___/ / jgroberts@xxxxxxxxxx / /_/ /---| | Room: BE436, Hilversum \____/ /_/ Tel: +31 35 687 4308 Fax: 5976 Vinu Arumugham wrote: > > Chris Cheng wrote: > > >Take an example of DDR in most PC design. The vref on receivers is basically > >the VTT which usually is generated from an external DC/DC converter that > >generates VDDQ/2 and is completely isolated from the driver VDDQ. > > > That does not sound like a good thing... > The receiver Vref should be driver Vddq/2. We usually generate it with a > resistor divider from driver Vddq. > This way, Vref will track Vddq better... > > Thanks, > Vinu > > ------------------------------------------------------------------ > To unsubscribe from si-list: > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field > > or to administer your membership from a web page, go to: > //www.freelists.org/webpage/si-list > > For help: > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > > List archives are viewable at: > //www.freelists.org/archives/si-list > or at our remote archives: > http://groups.yahoo.com/group/si-list/messages > Old (prior to June 6, 2001) list archives are viewable at: > http://www.qsl.net/wb6tpu > ============================================================= Subject:[SI-LIST] Re: Ground, the preferred reference plane Date: Wed, 11 Dec 2002 14:17:59 -0600 From: James_R_Jones@xxxxxxxx To: amahajan@xxxxxxxxxxxx, si-list@xxxxxxxxxxxxx Does it really matter whether a trace references power or ground? I believe that there is a symmetry between a driver's power and ground, and that it does not matter which one a trace references. By this I mean that a driver pulling high shorts to power and a driver pulling low shorts to ground. If the trace is referencing ground, then the return current loop is closed when pulling low, and return current must traverse through the nearest bypass when pulling high. If the trace is referencing power, then the return current loop is closed when pulling high, and return current must traverse through the nearest bypass cap when pulling low. There is a symmetry here, with equal amounts of return current traveling through the bypass cap either way, as long as the bit pattern is random. That being said, I note that many board manufacturers are using ground as a reference. It may be advantageous to reference ground when designing a board, especially if there will be 3rd party boards plugging into it. If you reference power, and the 3rd party board references ground, then there is a discontinuity in return current path, and return currents must go through the nearest VCC to ground cap. I have seen many designs using both VCC and ground equally for return current. I have heard speculation that this will reduce emissions, but I'm not very sure why this is the case. Can anyone explain? James R. Jones Dell -----Original Message----- From: Abhijit Mahajan [mailto:amahajan@xxxxxxxxxxxx] Sent: Wednesday, December 11, 2002 12:34 PM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Ground, the preferred reference plane I believe your explanation. I think noise on power plane might be a factor for the preference. Also, I believe it is usually harder in systems to provide the "correct" power reference plane (i.e., the supply from which the IOs draw current) for the entire length of the signal. GND however is universal and it is easier to make an entire plane ground. Due to numerous power supplies in most designs, providing a solid power plane for the correct power supply might be quite difficult. It is thus better to stick to a gound reference (and rely on bypass caps) unless you specifically design the power plane to be as nice a return path as ground. Ideally a line that will be driven both high and low should have both a power and a ground return path. For open drain signaling the return current will be only through ground. Abhijit. D G wrote: > Anand, > > As for why ground and not power, I can't answer that. Possibly power planes are noisier in general than ground planes. I'm surprised the book doesn't explain its preference. > > As for decoupling caps, anytime a signal transitions, current will flow between power and ground. Depending on the speed of the signal, current could be supplied from bypass caps, power-plane capacitance, or all the way back at the power source, but it will eventually flow between power and ground. > > As for current paths on signal traces and reference planes, it is true that a current on a signal trace induces a current on the reference plane. However, this induced current will eventually have to travel through one of the paths mentioned above. Remember, currents travel in loops. > > - Daniel > > From: "Kuriakose, Anand" <Anand.Kuriakose@xxxxxxx> > >>Hi All, >> >>In "High Speed Digital System Design" by Stephen Hall, it is mentioned that >>the ground-referenced signals have cleaner signal integrity when compared to >>power-referenced signals. >> >>Chipset design guides (not all) also recommend to have the high speed >>signals like processor signals routed over ground plane rather than over >>power plane. Also similar statements are made in a few other docs. >> >>I'd like to understand how does it improve the signal integrity of the >>signal when routed over GND plane rather than over power plane. In >>otherwords, what makes GND plane the preffered reference plane? >> >>One other point is that when signals are routed over power planes, the >>return current can get back to where it started without passing through any >>decoupling caps, making the return loop smaller (assuming that signals do >>not cross splits in the plane and no return path discontinuity due to layer >>changes). However, if the same signal is routed over GND plane, the return >>current will have to pass through a decoupling cap to complete the loop. >>Correct me if i am wrong in my above point. >> >>Regards, >>Anand. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu