[SI-LIST] Re: Current Return Vias
- From: "Giovanni Guasti" <giovanni.guasti@xxxxxxxxxx>
- To: "Ihsan Erdin" <erdinih@xxxxxxxxx>
- Date: Mon, 24 Jul 2006 13:36:10 +0100
Ihsan,
I do not think this is just a rule of thumb: this is an experience that
comes from measurements and simulations done in the last years.
Please give a look to the following link, I used HFSS and Hspice to
simulate. I do not like rules of thumb, this was the reason of a short
presentation for ANSOFT Partners in design - "Analisi critica delle
rergole di buon progetto" (critical analysis of "rules of thumb")
http://www.ansoft.com/partnersindesign/IT_guasti_italtel.pdf
Another presentation during the EMC of Rome 2005 "The strategic role of
EM field solver in Power and Signal Integrity" spent some slides on the
optimization of vias.
I would be glad to send you the file if you are interested in.
I do not want with this to convince anyone. But at this point, in order
to change my opinion, I need a research that states otherwise in a
peer-refereed publication. :-)
Design costs: in my mail I spoke about an analysis needed first, to
understand if a gnd via can be useful or not. In the most complex PCB I
followed there were only four differential pairs that could benefit from
this technique. So this is not a high cost, I think.
Board thickness and signal frequency spectrum must always be considered.
I would never suggest to double the number of via!
Best regards,
Giovanni
________________________________
From: Ihsan Erdin [mailto:erdinih@xxxxxxxxx]
Sent: 23 July 2006 16:33
To: Giovanni Guasti
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: Current Return Vias
Giovanni,
The EMC justification of a ground via in the close proximity of a
switching via is to minimize radial waves to the edges of the card by
providing a "return path" (I hate this phrase...) A two-wire kind of
transmission line -as you put it- would be another rationalization
against the impedance discontinuity for high-speed signals. In practice,
however, the placement of a ground via close enough to a switching via
in order to provide a matching impedance to -say 50 ohm- or to mitigate
radial wave propagation is in most cases -if not all- physically
impossible. I think this kind of SI/EMI rule-of-thumbs are based on a
qualitative understanding of electromagnetic theory rather than rigorous
research results. In this context, I share Lee's stance to debunk these
recommendations because they have significant effect on the design cost
by closing routing channels and eating up on the valuable board
real-estate. If anybody has come across any research that states
otherwise in a peer-refereed publication I'd like to hear that.
Regards
Ihsan
On 7/22/06, Giovanni Guasti <giovanni.guasti@xxxxxxxxxx> wrote:
Kenny,
GND vias near the signal are not dedicated to return currents, but they
are often used to optimize the impedance of the via.
As the via is a short transmission line, only the higher speed signals
can benefit of the difference between an optimized via and a "usual"
via.
You have to compare the higher frequency component of your signal, its
wavelength and the via length. This will give you an idea of the
effective needing to optimize this short transmission line.
Of course you could have a 133MHz signal with very sharp edges and high
frequency components, even if it seems very unusual... In this case it
would be wise to choose a slower transmitter!
The rule is to understand if the via behaves like a transmission line
for your signal or not, and in the first case to do the best to reduce
impedance discontinuities.
Best regards,
Giovanni
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Lee Ritchey
Sent: 22 July 2006 18:36
To: Kenny Frohlich; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Current Return Vias
Kenny,
It is not true that you need a "return current" via next to each layer
changing signal via. I continue to be amazed that engineers who are
looked upon as SI experts say such things.
Imagine you have a 4 layer PCB, such as the mother board in a PC, where
there are only two planes, one Vdd and one ground, where would such vias
connect? There have been billions of these made to date that work just
fine and have very fast signals on them. The return currents you are
concerned about find their way from plane to plane through the
collection
of decoupling capacitors and interplane capacitance that you had to
engineer into the power delivery system in order to make it stable.
Focus
on this and the return currents take care of themselves. EMI is
minimized
he same way..
> [Original Message]
> From: Kenny Frohlich <kenny_frohlich@xxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Date: 7/22/2006 6:45:56 AM
> Subject: [SI-LIST] Current Return Vias
>
> Dear Experts,
> I understand that I need to provide ground vias next to via
explictly
for the purpose of letting return currents jump between layers. I know
it's a requirement for high speed signals, especially differrential
signals. Is this also required for low speed single-ended signals
(133Mhz
or slower)? =20
> If this is a requirement, what would be a good signal via to ground
via
ratio? For example, there are five signal vias within a 1 inch area,
how
many ground vias do I need?
> =20
> Thank you
> Kenny
> =20
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