I'm more of a ground via "sprinkler" myself. They are more efficient and less
expensive. They contain the high frequency "supercavity" when ground planes
are above and below power planes.
Scott McMorrow, CTO Signal Integrity Group
Samtec
Office 401-284-1827 | +1-800-726-8329
www.samtec.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> On Behalf Of
Cosmin Iorga
Sent: Saturday, August 25, 2018 2:02 AM
To: Tom Dagostino <tom@xxxxxxxxxxxxxxxxx>; si-list@xxxxxxxxxxxxx; 'FRED MOTTER'
<motter@xxxxxxxxxxxxx>; FRED B <FRED@xxxxxxxxxxxxx>; Jacques Tazartes
<jacquest15@xxxxxxxxxxxxx>; EmadIbrahim <EIbrahim@xxxxxxxxx>;
Myrna5@xxxxxxxxxxxxxx
Subject: [SI-LIST] Re: Controlled ESR capacitor
Interesting discussion - here are some more thoughts: From a simplified
perspective "sprinkling" capacitors throughout the power planes combined with
the mounting inductance and planes cavity parasitics creates multiple RLC type
resonant loops "sprinkled" throughout the power plane region. Intuitively, it
is now a matter of frequency spectrum of the power supply transient currents to
decide if the multitude of RLC resonant structures help or not. If this method
worked in 70's and 80's (for those typical operating frequencies and rise/fall
times) it does not necessarily mean that it will work these days. It all
depends on how the spectral components of the power supply transient currents
overlap with the resonance frequencies of these "sprinkled" RLC resonant
structures. An FPGA for example may generate different transient supply
currents for different configurations, and on the same board if we load one
configuration file we may see improvement from this capacitor "sprinkling" te
chnique and if we load a different configuration file we may see no improvement
or even degradation of the PDN performance. So in my opinion there is no
unique answer to whether the capacitor sprinkling technique works or not.
Regards,
Cosmin
http://www.piscanner.com
--------------------------------------------
On Fri, 8/24/18, Bob B <Myrna5@xxxxxxxxxxxxxx> wrote:
Subject: [SI-LIST] Re: Controlled ESR capacitor
To: tom@xxxxxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx, "'FRED MOTTER'"
<motter@xxxxxxxxxxxxx>, "FRED B" <FRED@xxxxxxxxxxxxx>, "Jacques Tazartes"
<jacquest15@xxxxxxxxxxxxx>, "Ibrahim, Emad" <EIbrahim@xxxxxxxxx>
Date: Friday, August 24, 2018, 3:46 PM
Tom, I agree.
Worked at Litton Industries, Teledyne
Systems and Northrop Grumman as
Signal Integrity Manager from 70's till 2006. Working with Two EMC
counterparts, we improved test results, yield and success when we added and
critically placed decoupling caps to circuit board layouts. Capacitor design
and selection was one of my responsibilities early on. Also oscillator design
and research. I added these experiences because it helped reinforce the
analysis. Hope our hands-on experience helps.
Bob Bremer, retired.
On 8/24/2018 3:41 PM, Tom Dagostino
wrote:
Leestatement. If people have found important > information but can't share the
I don't agree with your last
[mailto:si-list-bounce@xxxxxxxxxxxxx]
Regards
Tom Dagostino
971-279-5325
tom@xxxxxxxxxxxxxxxxx
Teraspeed Labs
9999 SW Wilshire Street
Suite 102
Portland, OR 97225
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
Behalf Of leeritchey@xxxxxxxxxxxxx12:51 PM
Sent: Friday, August 24, 2018
To: 'Ravinder Ajmani'; CHARLES.GRASSO@xxxxxxxx; joel.brown@xxxxxxxxxx; >ESR capacitor
ken.patterson@xxxxxxxxxxxxxxxxx > Cc: asparky@xxxxxxxxxxxxxxxxxxxxxxxx;
'Istvan Novak'; > junichi.yamada.ak@xxxxxxxxxxx; 'SI-List'
Subject: [SI-LIST] Re: Controled
some change as capacitors are moved isn't > enough to conclude that this will
Ravinder,
The fact that a simulator shows
If there is good test datathat supports this as significant, it needs to > be shown or this should not
the results are company confidential as the > reason the proof cannot be
I often hear the statement that
12:42 PM
-----Original Message-----
From: Ravinder Ajmani <ravinder.ajmani@xxxxxxx> > Sent: Friday, August 24,
2018
To: leeritchey@xxxxxxxxxxxxx;CHARLES.GRASSO@xxxxxxxx;
joel.brown@xxxxxxxxxx;ken.patterson@xxxxxxxxxxxxxxxxx
Cc: asparky@xxxxxxxxxxxxxxxxxxxxxxxx; 'Istvan Novak'junichi.yamada.ak@xxxxxxxxxxx;
<istvan.novak@xxxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>Controled ESR capacitor
Subject: RE: [SI-LIST] Re:
actual data, which is Company
Lee,
As you often say, I can't provide
Confidential. I am attachinga part of ANSYS workshop showing details of > Resonant Mode Analysis, which
and CC list will not be able to see the > attachment.
Sorry, other than those on the TO
Some People and Astonish the Rest ....
Regards,
Ravinder Ajmani
Western Digital(r)
5601 Great Oaks Pkwy
San Jose, CA 95119
Ravinder.Ajmani@xxxxxxx
www.wdc.com
Always Do Right. This Will Gratify
Mark Twain[mailto:leeritchey@xxxxxxxxxxxxx]
-----Original Message-----
From: leeritchey@xxxxxxxxxxxxx
Sent: Friday, August 24, 201811:08 AM
To: Ravinder Ajmani <ravinder.ajmani@xxxxxxx>; CHARLES.GRASSO@xxxxxxxx; >junichi.yamada.ak@xxxxxxxxxxx;
joel.brown@xxxxxxxxxx; ken.patterson@xxxxxxxxxxxxxxxxx > Cc:
asparky@xxxxxxxxxxxxxxxxxxxxxxxx; 'Istvan Novak'
<istvan.novak@xxxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>Controled ESR capacitor
Subject: RE: [SI-LIST] Re:
me to believe this, because my experience > does not support that claim.
You have to show me, if you want
10:59 AM
-----Original Message-----
From: Ravinder Ajmani <ravinder.ajmani@xxxxxxx> > Sent: Friday, August 24,
2018
To: leeritchey@xxxxxxxxxxxxx;CHARLES.GRASSO@xxxxxxxx;
joel.brown@xxxxxxxxxx;ken.patterson@xxxxxxxxxxxxxxxxx
Cc: asparky@xxxxxxxxxxxxxxxxxxxxxxxx; 'Istvan Novak'junichi.yamada.ak@xxxxxxxxxxx;
<istvan.novak@xxxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>Controled ESR capacitor
Subject: RE: [SI-LIST] Re:
analysis on any plane pair, you will notice > localized resonances at
Lee,
If you perform a resonance
Some People and Astonish the Rest ....
Regards,
Ravinder Ajmani
Western Digital(r)
5601 Great Oaks Pkwy
San Jose, CA 95119
Ravinder.Ajmani@xxxxxxx
www.wdc.com
Always Do Right. This Will Gratify
Mark Twain[mailto:si-list-bounce@xxxxxxxxxxxxx]
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
Behalf Of leeritchey@xxxxxxxxxxxxx10:30 AM
Sent: Friday, August 24, 2018
To: CHARLES.GRASSO@xxxxxxxx;joel.brown@xxxxxxxxxx;
ken.patterson@xxxxxxxxxxxxxxxxxjunichi.yamada.ak@xxxxxxxxxxx;
Cc: asparky@xxxxxxxxxxxxxxxxxxxxxxxx; 'Istvan Novak'
<istvan.novak@xxxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>ESR capacitor
Subject: [SI-LIST] Re: Controled
engineering term? Sounds very arbitrary to me > and it is. Wouldn't change
When did sprinkling become an
Where did this idea comefrom? Is there supporting data?
<si-list-bounce@xxxxxxxxxxxxx>
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
Of Grasso, Charles12:21 PM
Sent: Thursday, August 23, 2018
To: joel.brown@xxxxxxxxxx;ken.patterson@xxxxxxxxxxxxxxxxx
Cc: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>; >The low inductance application is for
asparky@xxxxxxxxxxxxxxxxxxxxxxxx; Istvan Novak <istvan.novak@xxxxxxxxxxx>;
junichi.yamada.ak@xxxxxxxxxxx; SI-List <si-list@xxxxxxxxxxxxx> >Subject: [SI-LIST] Re: Controled ESR capacitor > > I see two distinct
applications.
energy delivery. The cap sprinkle(sorry Lee!) is to manage the interplane > resonances.
[mailto:si-list-bounce@xxxxxxxxxxxxx]
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
Behalf Of Joel Brown10:47 AM
Sent: Thursday, August 23, 2018
To: ken.patterson@xxxxxxxxxxxxxxxxxit clearly states the most important
Cc: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>; >
asparky@xxxxxxxxxxxxxxxxxxxxxxxx; Istvan Novak <istvan.novak@xxxxxxxxxxx>;
junichi.yamada.ak@xxxxxxxxxxx; SI-List <si-list@xxxxxxxxxxxxx> >Subject: [SI-LIST] Re: Controled ESR capacitor > > This message
originated outside of DISH and was sent by:
si-list-bounce@xxxxxxxxxxxxx
In the book I previously mentioned
aspect of a bypass cap is mountinginductance.
Adding a discrete resistor inseries obviously adds a significant amount of > inductance.
But since the PDN impedeance wouldbe flatter maybe the extra inductance can > be tolerated.
Would be interesting to see thetrade offs between very low ESR with lowest > inductance and resistor in
Ken Patterson <
On Thu, Aug 23, 2018 at 8:58 AM,
ken.patterson@xxxxxxxxxxxxxxxxx>wrote:
not inhale them accidentally!
You have to wear a mask as to
AM <leeritchey@xxxxxxxxxxxxx>On Thu, Aug 23, 2018 at 11:56
Message-----
I can't even see 0201s!
-----Original
<si-list-bounce@xxxxxxxxxxxxx>From: si-list-bounce@xxxxxxxxxxxxx
22, 2018 5:08 PMBehalf Of Aubrey Sparkman
Sent: Wednesday, August
junichi.yamada.ak@xxxxxxxxxxx;To: leeritchey@xxxxxxxxxxxxx
Cc: istvan.novak@xxxxxxxxxxx;
Controled ESR capacitorsi-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re:
0201s...
Discontinue 0402s for
instead of 0402s if you are doing a redesign >>> due to caps.
Consider using 0201s
:-)
Youre welcome!
11:29 AM, <leeritchey@xxxxxxxxxxxxx>
Aubrey
Sent from my iPhone
On Aug 22, 2018, at
wrote:leeritchey@xxxxxxxxxxxxx>
by our ceramic capacitor suppliers that they >>>> were >>> discontinuingWe just got informed
Message-----the smaller size.
What next?
-----Original
Controled ESR capacitorFrom: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> >>>>
On Behalf Of Istvan Novak >>>> Sent: Tuesday, August 21, 2018 8:30 PM
Subject: [SI-LIST] Re:To: junichi.yamada.ak@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx >>>>
part of a generic trend of component shortage >>>> and >>> product
Hi Yamada,
This appears to be
you need an ohm of ESR, you can simply add a >> series >>> one-ohm discreteOn a practical note: if
if you already have a product in volume >>> manufacturing with just theThis of course wont help
AM, Junichi Yamada wrote:Regards,
Istvan Novak
On 8/21/2018 9:49
use ESR controlled capacitor. (For example ESR > >> 1000 >>>>> m) However,Hello experts
In my product, I
if you know another capacitor with similar >>> characteristics.https://product.tdk.com/info/en/products/emc/emc/absorber/catalog
.htm
l
Please let me know
Murata's LLR series. (However, there is the >>>>> possibility of* I know the
-----------------------------------------------------------------h
tml
Regards.
Yamada
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