[opendtv] Re: Recovery based on CE

  • From: Eory Frank-p22212 <Frank.Eory@xxxxxxxxxxxxx>
  • To: "'opendtv@xxxxxxxxxxxxx'" <opendtv@xxxxxxxxxxxxx>
  • Date: Mon, 7 Jun 2004 18:07:04 -0700

From: "John Shutt" <shuttj@xxxxxxxxx> 
To: <opendtv@xxxxxxxxxxxxx> 
Date: Mon, 7 Jun 2004 17:29:02 -0400 

>Nothing personal, Bert, but the next time someone says that ATSC chip
>equalizers will cost next to nothing because 'its just silicon' will have to
>explain digital camera memory chip pricing to me.
>
>John Shutt

Yes, in the future all silicon will be free -- as long as it's the kind you get 
at the beach :)

The low costs that are always projected for CE products have lots of 
interesting assumptions built into them -- most notably, the assumptions of 
huge volumes. Moore's Law marches on, but economics are starting to put a twist 
on it. 90 nm is turning out to be very...umm...interesting, and 65 nm is really 
stratospheric stuff. Designers and the EDA industry whose tools enable them are 
facing some radical shifts in methodology -- and risk. At $1M per mask set, 
"risk" is a word that managers really pay attention to. And situations like "we 
HAVE to build the ATSC chip in 90 nm, and even then it will be really HUGE" do 
not help the business case.

As long as ATSC receiver/decoders remain a small niche market, no chipmaker is 
going to make a nickel off this stuff. But wait, we have a government mandate, 
so the volumes will surely materialize, right? Let's see how consumers respond 
to the "DTV tuner tax" -- not this year, when we're talking HDTV sets -- but in 
1-2 years when Aunt Millie goes to buy a regular TV at Wal-Mart, and learns the 
real cost of "free" off-air TV. She will most likely also learn a new word -- 
"monitor" -- the thing she will be willing to pay for, to plug into her 
satellite or cable set-top box.

-- Frank 
   

----- Original Message ----- 
From: "Manfredi, Albert E" <albert.e.manfredi@xxxxxxxxxx>

>> Interesting perspective.
>>
>> > In an annual survey, the Synopsys Users Group reported that
>> > the average designs are now at 5 million gates, five times
>> > the typical chip density of just one year ago. Synopsys is
>> > tracking 150 designs at 90 nanometers and a couple of dozen
>> > at 65 nm, most of them assuming a world of 300-mm wafers
>> > with copper and low-k dielectrics in place.
>> >
>> > "The train is moving very quickly," de Geus said.
>>
>> Oops. That "train" again. But this time, it might truly have
>> left the station, and I think this is how we're going to see
>> the price of DTT receivers drop dramatically. This in spite
>> of the much more cautious recovery we're in, according to the
>> article. Digital TV, among other CE products, it says, will
>> play a major role.
>>
>> Bert
 
 
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