[SI-LIST] Re: surface roughness

  • From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
  • To: "nagachander.sing@xxxxxxxxxxxxxxxxxxxx" <nagachander.sing@xxxxxxxxxxxxxxxxxxxx>, si-list <si-list@xxxxxxxxxxxxx>
  • Date: Sat, 19 Nov 2011 09:38:56 -0800

To my mind, there's not a quick answer; there are several issues:
1)      Does the simulator have any accommodation for surface roughness?
a.      If so, what model do they use?
i.      If it's the Hammerstad model, that's been proven to be fundamentally 
flawed (see the DesignCon 2010 paper, "Impact of Copper Surface Texture on 
Loss, a Model that Works.")
ii.     If it's a more accurate model, you'll need to know some pretty 
sophisticated aspects of your copper roughness.
b.      I believe most models today are rough approximations at best, except 
for some very specific instances where great care has been taken to correlate 
loss to the exact topology of the copper surface
i.      I don't know how you can model surface roughness without a 
sophisticated model of the exact topology - there's going to be a profound 
difference between large, smooth undulating hills, and a surface with lots of 
sharp "fissures"
ii.     Until we understand better the actual copper texture, I don't think we 
can say we have a superbly accurate modeler.
2)      Copper texture, and the factors that influence it, aren't well 
understood at this time.  You can take very smooth copper and turn it into a 
very rough surface by an Oxide Alternative (OA) process
a.      In the PCB world, we're just now beginning the investigation into the 
various aspects of copper texture.  I believe there's still a lot more that "we 
don't know we don't know" than we do know.
b.      I haven't seen any papers discussing copper texture in the IC world - 
I'd love to hear about them
c.      On the bright side, if you're talking about IC features, every 
cross-section I've seen has shown those to be extremely smooth, and I believe 
the loss tangents are relatively high.  Perhaps the copper texture isn't such a 
huge effect, even up to 50GHz.
I would guess your best bet is to build some models with the best methods 
available and see if, at their worst, they indicate an enormous effect, or one 
that can be largely ignored.  If it's the first, there's a lot of work to 
understand the specifics, if PCB experience is any indication.

I haven't heard of any profound impacts on return loss.

Sources of information that I know of (as well as the DesignCon paper):
*       Paul Huray's book "The Foundations of Signal Integrity"
*       Steve Hall's book "Advanced Signal Integrity for High-Speed Digital 
Designs"

I hope this helps - it will be interesting to hear what folks say about copper 
roughness in IC's.

Jeff Loyer

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of nagachander.sing@xxxxxxxxxxxxxxxxxxxx
Sent: Friday, November 18, 2011 11:35 PM
To: si-list
Subject: [SI-LIST] surface roughness

Hi all,
What is the best tool to simulate surface roughness when simulating for
the differential S-parameters for striplines and microstripline in IC
packages?

I am interested in simulating till 50GHz.

What kind of effects are you seeing with surface roughness? i mean things
like does your insertion loss increase? what abt diff return loss?

Any good papers to understand the problems in detail...

Any feedback will be appreciated

Thanks,
Naga

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