[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator
- From: Zhangkun <zhang_kun@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 05 Aug 2003 11:57:58 +0800
Dear All:
In our simulation and measurement, we found that power noise of at least 400MHz
could be decoupled by discrete caps. The placement DOES matter the impedance of
PDS. The current problem is the anti-resonance between different kinds of caps.
Best Regards
Zhangkun
2003.08.05
----- Original Message -----
From: "Juergen Flamm" <jflamm@xxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Tuesday, August 05, 2003 3:44 AM
Subject: [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator
> A tool from Cadence called SPECCTRAQuest with the Power Integrity option =
> will not only allow you to evaluate various capacitor types and =
> quantities, but also include their placement locations, their individual =
> mounted inductances and a model of the plane pair they are connected to. =
> The plane model includes skin effect and dielectric losses. It is not =
> only pretty cool to use, but very accurate and shares the same database =
> with the Allegro layout tool.=20
>
> Check it out if you like. =20
>
> Regards=20
>
> Juergen Flamm
>
> -----Original Message-----
> From: Peterson, James F (FL51) [mailto:james.f.peterson@xxxxxxxxxxxxx]=20
> Sent: Monday, August 04, 2003 12:19 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator
>
> Doug,
>
> In regards to :=20
>
> <snip>
> 1. The reason we wrote the calculator in the first place was because we=20
> couldn't figure out how to make the frequency response calculation for =
> an=20
> arbitrary number of capacitors with arbitrary values, inductance and ESR =
>
> any other way. Then we figured others might have the same problem and =
> would=20
> like access to the same tool.
> <snip>
>
> We've been having excellent results doing this very thing using PSPICE.
>
> We get complete control over ESR and ESL values, qty of caps, and their
> values.=20
>
> We plot the results as ohms and freq (log) - which requires a little
> config...
>
> regards,
> Jim Peterson
>
>
>
>
> -----Original Message-----
> From: Doug Brooks [mailto:doug@xxxxxxxxxx]
> Sent: Monday, August 04, 2003 1:42 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator
>
>
> As the author of this calculator, I guess I'd like to throw in my 2 =
> cents=20
> worth!
>
> 1. The reason we wrote the calculator in the first place was because we=20
> couldn't figure out how to make the frequency response calculation for =
> an=20
> arbitrary number of capacitors with arbitrary values, inductance and ESR =
>
> any other way. Then we figured others might have the same problem and =
> would=20
> like access to the same tool.
>
> 2. The calculator helps demonstrate (as does our article) that one thing =
>
> that is REALLY desired for a smooth impedance response is a continuum of =
>
> capacitor self resonant frequencies (not necessarily simply capacitor=20
> VALUES). A large number of caps with the same self resonant frequency =
> gives=20
> you a single deep zero. Many self resonant frequencies spread over a =
> range=20
> give you multiple zeros, spreading out the response much more =
> effectively.=20
> MORE IMPORTANTLY, these zeros (and don't forget the poles in between) =
> REACT=20
> with each other to provide a smoother response. The calculator helps you =
>
> demonstrate and prove that.
>
> 3. Along the way, the results from the calculator provided the evidence=20
> (unexpected at the time) that moderate ESR is better than low ESR. The=20
> reason is that while low ESRs give you very deep zeros, they also lead =
> to=20
> very high peaks. Moderate ESR gives you an OVERALL better frequency
> response.
>
> 4. Finally, the calculator does not address the issue of placement. My=20
> input on that question is this: Placement doesn't much matter EXCEPT for =
>
> (a) the electrons must be able to get where they are needed in time=20
> (traveling at 6"/ns) and (b) loop areas (including those around and =
> through=20
> caps) must be minimized for EMI reasons. Most people are aware of these=20
> issues, and if they are taken care of, THEN placement is no longer an =
> issue.
>
> Hope this helps
>
> Doug Brooks
> >
>
> Doug Brooks' new book, "Signal Integrity Issues and Printed Circuit =
> Board=20
> Design" has just been released by Prentice Hall. See details and =
> ordering=20
> info at www.ultracad.com
> _________________________________________________________________________=
> ___
> __
>
>
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