[SI-LIST] Re: PDN related
- From: steve weir <weirsi@xxxxxxxxxx>
- To: "Lynne D. Green" <lgreen22@xxxxxxxxxxxxxx>
- Date: Mon, 15 Mar 2010 10:56:08 -0700
Lynne, today it is possible to cover two or more frequency decades
cheaply and effectively using one modest capacitor case size such as
0402. With a few exceptions the inductance of a MLCC in a given case
size is very constant. Depending on the board stack-up and via
attachment scheme, it may be nearly impossible to distinguish inductance
differences between mounted capacitors of different capacitances in the
same case size.
The motivation for many capacitor values is to present a flattened and
over some frequency range resistive impedance over the power plane
extents across a frequency band. There are a number of proponents to
that idea and some notable detractors.
Deploying multiple capacitor values is one technique that can
approximate that behavior. Another is a scheme Istvan has written on he
calls Distributed Matched Impedance or Distributed Matched Bypass.
Under that scheme there is really only one capacitor value used to
bypass mid to high frequencies. It differs from the big "V" technique in
that the ESR is artificially elevated.
Best Regards,
Steve.
Lynne D. Green wrote:
> Depends on the frequency range where you need PDN clean.
> If it is a wide range (generally true) then one would use
> more than one value of capacitor. Remember, capacitor
> impedance increases at high frequency due to inductive
> package effects.
>
> Lynne
>
>
> "IBIS training when you need it, where you need it."
>
> Dr. Lynne Green
> Green Streak Programs
> http://www.greenstreakprograms.com
> 425-788-0412
> lgreen22@xxxxxxxxxxxxxx
>
>
> Scooby Doo wrote:
>
>> Hi SI Experts,
>>
>>
>> I have a question reg PDN.
>>
>> Suppose an FPGA has 100 I/O pins with 10 VCCO/Gnd pairs. So an average of 10
>> I/O pins for 1 VCCO/Gnd pair. Assume each I/O pin driving 10pf load.
>>
>> My qn is, to make the clean PDN, is it enough to provide 100pf of capacitor
>> to each Vcc/Gnd pair?
>>
>> I am not convinced with blindly provinding 0.1uF cap to Vcco pins.
>>
>> kindly clarify.
>>
>> Thanks in advance for your valuable feedback.
>>
>> Rajesh
>>
>>
>>
>
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> //www.freelists.org/webpage/si-list
>
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>
> List technical documents are available at:
> http://www.si-list.net
>
> List archives are viewable at:
> //www.freelists.org/archives/si-list
>
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
>
>
--
Steve Weir
IPBLOX, LLC
150 N. Center St. #211
Reno, NV 89501
www.ipblox.com
(775) 299-4236 Business
(866) 675-4630 Toll-free
(707) 780-1951 Fax
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List technical documents are available at:
http://www.si-list.net
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
