[SI-LIST] Re: Layer Stackup
- From: "Michael Khusid" <mkhusid@xxxxxxxxxx>
- To: <swldstn@xxxxxxxxxxxx>
- Date: Mon, 12 Jan 2004 10:35:33 -0500
Steve,
There are two effects in play here. Both need to be considered when
examining stackups.
1. Return path discontinuity when signal changes layers - return current
needs to jump from power to ground through a decoupling capacitor, or =
from
ground to ground layer through a ground via.
2. Impedance of power/ground structure -- the distributed capacitance
between power and ground in terms of plane-to-plane capacitance plus
decoupling capacitors placed on the board.
The stackup #1 addresses issue #1 and ignores issue #2.
Vice versa, the stackup #2 addresses issue #2 for PWR1 and ignores issue =
#1.
Given little knowledge of the layer thicknesses and the application, I =
think
these stackups are equal. You will need to worry about quality =
decoupling
capacitor scheme in either case.
Mike
----------------------------------------------------------------
Michael Khusid
Ansoft Corporation
SI/HF Application Engineer
=20
25 Burlington Mall Road, 5th floor
Burlington, MA 01803-4100
=20
Tel 781-229-8900 Ext. 134=20
Fax 781-229-8624
---------------------http://www.ansoft.com ---------------------
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx =
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Steven M. Waldstein
> Sent: Friday, January 09, 2004 10:09 PM
> To: calixlnguyen@xxxxxxxxxxx; chris.mcgrath@xxxxxxxx; si-
> list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Layer Stackup
>=20
> I have a follow up question.
>=20
> My experience with other is that they prefer a stackup
> more like
>=20
> Signal
> Ground
> Signal
> Pwr 1
> Pwr 2
> Signal
> Ground
> Signal
>=20
> This is only an 8 layer example but I've been told they prefer
> this to
> Signal
> Ground
> Signal
> Pwr 1
> Ground
> Signal
> Pwr 2
> Signal
>=20
> Because all signals are uniformly reference to ground. And a signal
> that has to go in both x and y stays reference to the same ground
> plane. They prefer this and don't have to rely on local decoupling
> when a signal changes layer to give the propeper return path.
>=20
> Any comments about this or feedback.
>=20
> Steve
> swldstn@xxxxxxxxxxxx
>=20
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Long Nguyen
> Sent: Friday, January 09, 2004 1:50 AM
> To: chris.mcgrath@xxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Layer Stackup
>=20
>=20
> I agree. Having interplane capactance between power and ground planes
> also
> provides another advantage is that you may be able to use thinner ZBC
> cores
> with 2mils thickness instead of 3mils and thus reducing your overall =
board
> thickness. In other words, you get 'free' buried capacitance for your
> stackup at no additional charge.
> -Long
>=20
>=20
>=20
> ----- Original Message -----
> From: "Chris McGrath" <chris.mcgrath@xxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Sent: Wednesday, January 07, 2004 8:23 AM
> Subject: [SI-LIST] Re: Layer Stackup
>=20
>=20
> > David,
> >
> > Just out of curiosity, why are you going to Nelco 4000-13? From =
your
> > original post it doesn't sound like you are overly concerned about
> > routing lengths and you are not dealing with excessively high speed
> > signals.
> >
> > Regarding Lee's post, I think it is good practice to have at least =
one
> > pair of power and ground planes next to each other but having worked =
on
> > a 42 layer board (Nelco 4000-13SI, 4 mils) that had interfaces =
running
> > between 125 MHz and up to 1 GHz and routing it completely in a dual
> > stripline stackup without any adjacent power and ground planes I =
think
> > that proper coupling of the planes can be achieved without forcing =
you
> > to muck with your proposed stackup. I should add that the 42 layer
> > board carried a range of voltages including 0.9V from a daughter =
board
> > (through connectors) and had no problems passing the EMI =
qualifications.
> > Nothing involved with that board was easy, but it showed that what =
you
> > are proposing can be done.
> >
> > -Chris
> >
> >
> > > -----Original Message-----
> > > From: Lee Ritchey [mailto:leeritchey@xxxxxxxxxxxxx]=3D20
> > > Sent: Wednesday, January 07, 2004 11:03 AM
> > > To: david.kaushansky@xxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> > > Subject: [SI-LIST] Re: Layer Stackup
> > >=3D20
> > >=3D20
> > > David,
> > >=3D20
> > > The problem you will have with this stackup is the lack of=3D20
> > > interplane capacitance between power and ground planes. This=3D20
> > > will manifest itself in several ways. Very high ripple on=3D20
> > > your power supplies when transmission lines switch, =3D20
> > > potentially very high EMI, unstable operation.
> > >=3D20
> > > It is imperative that you make sure that Vcc and ground=3D20
> > > planes are close to each other. If you have several=3D20
> > > different supply voltages, this will mean several pairs of=3D20
> > > power planes.
> > >=3D20
> > > If you really need that many signal layers, it will be=3D20
> > > necessary to add plane layers to get it right.
> > >=3D20
> > > Lee=3D20
> > >=3D20
> > >=3D20
> > > > [Original Message]
> > > > From: <david.kaushansky@xxxxxxxxxxxx>
> > > > To: <si-list@xxxxxxxxxxxxx>
> > > > Date: 1/7/2004 6:40:52 AM
> > > > Subject: [SI-LIST] Layer Stackup
> > > >
> > > > The design I am working has a fairly dense placement. To=3D20
> > > try minimize=3D20
> > > > my
> > > > time in artwork, I would like to add as many routing layers=3D20
> > > as possible
> > > to=3D20
> > > > my layer stackup. I was thinking of using an 18 layer board of =
Nelco
> > > > 4000-13, with the following stackup:
> > > > Signal1
> > > > GND
> > > > Signal2
> > > > Signal3
> > > > PWR
> > > > Signal4
> > > > Signal5
> > > > GND
> > > > Signal6
> > > > Signal7
> > > > GND
> > > > Signal8
> > > > Signal9
> > > > PWR
> > > > Signal10
> > > > Signal11
> > > > GND
> > > > Signal12
> > > >
> > > > The skinniest dielectric thickness is 4 mils, all signal layers
> are=3D20
> > > > 0.5
> > > Oz=3D20
> > > > copper and plane layers are 1 Oz copper. The fastest signals =
are=3D20
> > > > 100MHz,
> > > > with rise times in 500ps range.=3D20
> > > > My primary concern is the ratio of 6:12 of plane layers to =
signal
> > > layers.=3D20
> > > > I usually try to design for a ratio of about 8:10 or 9:9. I =
know
> I=3D20
> > > > will
> > > > have to be very careful about crosstalk on adjacent layers,=3D20
> > > but other
> > > than=3D20
> > > > that, what else should I be concerned about?
> > > >
> > > > Thanks
> > > > Dave
> > > >
> > > >
> > > >
> > > > =
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