[SI-LIST] Re: How to simulate worse case eye

  • From: <thollis@xxxxxxxxxx>
  • To: <joel@xxxxxxxxxx>, <SI-LIST@xxxxxxxxxxxxx>
  • Date: Fri, 6 Mar 2009 15:56:22 -0700

Joel,

I'm sure there will be no shortage of recommendations here, but here's
my contribution:

It's pretty easy to determine the worst case pattern for a single route,
assuming the system is linear-time-invariant.

1. Start by generating the pulse response of the system.

2. Then sample the response at UI intervals from the Peak or cursor
sample, or just eyeball the ISI at these intervals.

3. Based on the direction or polarity of the ISI terms, and their
relative distances from the cursor (in UI), you can determine what input
pattern can be used to maximize the combined contributions of the ISI
terms. Positive-going ISI terms eat away from the nominal zero level,
and negative-going ISI terms eat away from the nominal one level.

4. You can then move your cursor away from the peak of the pulse
response and repeat the process to determine patterns targeting points
across the width of the eye if desired.


If you haven't read it, check out Bryan Casper's paper describing the
use of Peak Distortion analysis to generate Worst Case Eyes. It doesn't
explicitly tell you how to generate the worst case pattern, but it may
inspire you.

B.K. Casper, et al, "An accurate and efficient analysis method for
multi-Gb/s chip-to-chip signaling schemes."

If you've got IEEE access:
http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=1015043&isnumber=218
31 


Tim Hollis
DRAM Design
Micron Technology, Inc.



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Joel Brown
Sent: Friday, March 06, 2009 3:35 PM
To: SI-LIST@xxxxxxxxxxxxx
Subject: [SI-LIST] How to simulate worse case eye

I was watching a webinar by Mentor on Hyperlynx and how they can quickly
generate a prbs pattern that results in a worse case eye diagram. They
said
without this feature it could take days or even years of simulation to
do
this.
I do most of my simulation in hspice since most of my models are based
in
Hspice.

Is there a way to do what Mentor is claiming in Hspice by generating a
certain pattern?

I have been using the following code for a prbs sequence:

 

vin inr vcm LFSR(0.1 -0.1 1n 5ps 5ps 

+ 'data_rate' 1 [7,4,1] rout=0)

vinn innr vcm LFSR(-0.1 0.1 1n 5ps 5ps 

+ 'data_rate' 1 [7,4,1] rout=0)

 

Thanks - Joel



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