[SI-LIST] Re: Effects of overshoot/undershoot on long-term reliability

  • From: Jeff Krinsky <jkrinsky2003@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Sat, 15 Apr 2006 16:03:18 -0700 (PDT)

Mikhail:
   
  I believe that more analysis will reveal that a redesign is required.  I was 
involved in a similar situation myself at a company where the engineers had 
started using Actel FPGA devices without realizing just how fast their edge 
rates were at 1ns.  Since most engineers had not worried about terminating FPGA 
outputs before, they did not think it would be necessary with Actel devices.  
In the end however, large amounts of overshoot and undershoot were experienced. 
Even though the boards were working, it was decided that for reliability 
purposes it was best to do a redesign with termination resistors at the FPGA 
outputs.
   
  Jeff Krinsky

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