[SI-LIST] Re: Do you ever measure any of the things you model?

  • From: "Lance Wang" <lwang@xxxxxxxxxx>
  • To: "'Chris Cheng'" <Chris.Cheng@xxxxxxxx>, "'Muranyi, Arpad'" <Arpad_Muranyi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 1 Apr 2008 13:47:28 -0400

Hi, Chris,
I believe Arpad wants to express that IBIS is working on them. However, the
sad thing is no model out there yet as you point out. 

There is no simple modeling technique for advanced models (such as SSO,
etc.). I think the key, getting a good modeling standard to fly and solve
the real design issues, is to have the tools. Imaging how many Spice
transistor-level models will be there if there is no tools could create them
by clicking buttons. This is the same to IBIS as well... We are not quite
there yet.

My two cents,

Lance Wang
IO Methodology Inc.
978-764-2298

FREE!!! 
SignalMeth(TM) - A Powerful Waveform Post-Processing Tool 
Goto www.iometh.com for details



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Chris Cheng
Sent: Monday, March 31, 2008 10:30 PM
To: Muranyi, Arpad; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Do you ever measure any of the things you model?

I know the fancy BIRD and new specs.=20
I am asking who is stepping up to the plate and deliver them to =
customers.=20
The last time we talked about IBIS with SSO, it was many many many years =
ago. The spec and BIRD were out then too, yet I have heard of no one =
delivering model like that. In the mean time, DDR1 is gone and DDR2 is =
on its way to become DDR3, am I the only one seeing SSO problems in them =
? Or everyone just look the other way and claim perfect correlation with =
only one driver switching and call it a day ?
I know 100Gb/s SERDES are the heat right now. But there are those of us =
need to ship systems with memory on board. I am just asking for help.=20
Now let me have a show of hands, who's willing to step to the plate ?


.......sounds of cricket........




=20
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Muranyi, Arpad
Sent: Monday, March 31, 2008 6:58 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Do you ever measure any of the things you model?


Chris,

SSO is a fairly difficult thing to model behaviorally,
but we have at least two BIRD-s which intend to provide
means to the legacy IBIS style behavioral modeling to
help that situation.

BIRD 95.6:
http://www.vhdl.org/pub/ibis/birds/bird95.6.txt

and BIRD 98.3:
http://www.vhdl.org/pub/ibis/birds/bird98.3.txt

Since we are getting very close to the release of the
next major revision of the IBIS specification, these
BIRD's will most likely become an official part of the
IBIS 5.0 spec rather soon.

And the reason I used the words "legacy IBIS style" above
is because if someone is not shy about using any of the
*-AMS extensions of IBIS, they can write out their heart's
content using those modeling languages to include any SSO
effect they wish.  These extensions have been available
since IBIS 4.1 was ratified in January of 2004.

I agree, it may be debatable whether it is easier to
simulate SSO with transistor models instead of figuring
out how to model those effects behaviorally.  However,
I would like to caution the non-suspecting bystander
that more transistor models than you would like to see
make use of that handy little shorthand feature called
.global, making SSO simulations useless or impossible.
Add to that some encryption, and you are out of luck.

Arpad
=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D=
3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D
=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D=
3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D
=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D=3D3D


-----Original Message-----
From: Chris Cheng [mailto:Chris.Cheng@xxxxxxxx]=3D20
Sent: Monday, March 31, 2008 6:32 PM
To: Muranyi, Arpad; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Do you ever measure any of the things you =3D
model?

There is always this little problem called memory. FBDIMM is not taking =
=3D
off. DDR2/3 is around everywhere.
I guarantee you I've seen SSO in DDR channels, a lot. How does one =3D
correlate DDR models without SSO ?

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Muranyi, Arpad
Sent: Monday, March 31, 2008 6:25 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Do you ever measure any of the things you model?


Chris,

I think the dance floor is called SERDES these days.  I haven't
seen anyone using transistor level models in that field to get
BER estimates down to double digit exponents.  Whether it is
done in C, Matlab, *-AMS, doesn't matter, its still behavioral
modeling, isn't it?  Of course, this is a slightly different
topic from matching I-V and V-t curves, but no one can escape
the correlation steps in this world either, as they shouldn't
in the SPICE world either...  And I think this thread started
mainly around the topic of correlation.

Arpad
----------------------------------------------------------------


-----Original Message-----
From: Chris Cheng [mailto:Chris.Cheng@xxxxxxxx]=3D3D20
Sent: Monday, March 31, 2008 5:31 PM
To: Muranyi, Arpad; si-list@xxxxxxxxxxxxx
Subject: RE: [SI-LIST] Re: Do you ever measure any of the things you =
=3D3D
model?

Arpad,
I don't think we need to go into a flame war again.
I just want to know who is actually shipping IBIS 4.0 or 4.1 models to =
=3D
=3D3D
customer that can do SSO.
We are all dress up, I need to know where's the party ?
The Gala Ball of SPICE models for customers with ten million dollar PO =
=3D
=3D3D
is out of my league, I am settling for the IBIS for the mass punk rave. =
=3D
=3D3D
Please tell me where is the dance floor ?
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