Vinod, You need to check the setup n hold time margin for the choice of topology before finalizing. Thanks Sen Msg: #12 in digest From: "Vinod Kumar"<vinod.kumar@xxxxxxxxxxxx> Subject: [SI-LIST] Re: DDR3 routing Topology selection Date: Wed, 19 Jun 2013 17:09:45 +0530 Hi Hermann, Thank you very much for your inputs. And extra time for calibration is not an issue. My main concern is the support for DDR3 calibration with the BSP that I got from vendor. In the reference board, there are four DDR3 chips and T-topology is used and there are no terminations. So I am not sure if write leveling is supported in the reference code. I was actually thinking about those additional efforts if there is no code support. BTW, I am inclined more towards fly by topology. Regards, Vinod ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu