[SI-LIST] Re: DDR3 routing Topology selection

  • From: Hermann Ruckerbauer <Hermann.Ruckerbauer@xxxxxxxxxxxxx>
  • To: doltbird1972@xxxxxxxxxxx
  • Date: Wed, 19 Jun 2013 11:32:40 +0200

Hello,

for two devices at 533 you might have a chance to work without CA
Termination for the T-Branch.
For Flyby this might not be possible.

Regarding your comments it looks T is having higher overshoots and
therefore I would excpect FlyBy to show better SI (what is different
than what you write).
T seems to have overshoots, while the levels for FlyBy seems nicly
terminated and therefore not even reaching the full swing voltage rails ..

Best regards

Hermann

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Hermann Ruckerbauer
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schrieb Doltbird1972:
> Sonu,
> As for 2 DDR3 chips on your board, it does not matter what kind of topology
> you are using. Just thinking about convenience for your layout.
> ( The thing will be totally different when more than 4 chips. )
>
> Regards!
>
> ShaoPeng
> IEEE Member, Senior SI Consultant and PCB Engineer
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of Sonu Goyal
> Sent: 2013年6月19日 16:34
> To: si-list@xxxxxxxxxxxxx
> Cc: Vinod Kumar
> Subject: [SI-LIST] DDR3 routing Topology selection
>
> Hi
> We are designing a custom board where 2 DDR3 chips (533MHz) are interfaced
> with processor. There are two routing toplogies which we are considering for
> our layout.
> 1. T topology
> 2. Fly-By topology
>
> We have done pre-layout SI simulation using hyperlynx. As we know  for DDR3
> flyby topology is recommended by JEDEC but according to our simulation
> results  T topology is looking better.
>
> In T topology overshoot is coming 1.6V and undershoot is -0.1V and in Fly-By
> topology overshoot is coming at 1.225V and undershoot at 240mV. I am
> attaching snapshots here. Please confirm what topology flyby or T topology
> we should prefer for our board.
>
> Regards
> Sonu Goyal
>
>
>
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