I am assuming he is referencing Figure 2. The vertical axis is Reflection
coefficient and the horizontal axis is plane separation in mm. For today's
boards even 0.5 mm is a huge plane separation, 0.5 mm is 0.0197 inches approx.
On dense high speed boards with differential routing I would think the
separation between ground layers would be in the 6-8 mil range. Those planes
are frequently both ground planes. Power/ground plane pairs can be 3.5 mils
and under. The copy of that paper is a poor scan. I have read it years ago, I
wonder if I have a copy somewhere.
Chris Mulvey
Principal Hardware Engineer
Curtiss-Wright
20130 Lakeview Center Plaza, Suite 200, Ashburn, VA 20147
T: 703.840.6709
v_cmulvey@xxxxxxxxxxxxxxxxx | www.curtisswrightds.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Lee Ritchey
Sent: Monday, January 9, 2017 5:44 PM
To: CurtM@xxxxxxxxxxx; istvan.novak@xxxxxxxxxxx; bbakshan@xxxxxxxxx;
bertsimonovich@xxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: An Article on what ground is
What curve are you speaking of?
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Curt McNamara
Sent: Monday, January 9, 2017 2:09 PM
To: leeritchey@xxxxxxxxxxxxx; istvan.novak@xxxxxxxxxxx; bbakshan@xxxxxxxxx;
bertsimonovich@xxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: An Article on what ground is
Hoping someone can check my quick math!
The amplitude graph on the left shows about 5% (.05) "escaping" (i.e. not
reflected) at ~2.5GHz.
Is that correct?
Does that imply -26dB?
If so, plenty to worry about.
Curt
Curt McNamara, P.E.
Engineering Consultant
North Pole Engineering
www.npe-inc.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Lee Ritchey
Sent: Monday, January 9, 2017 4:01 PM
To: istvan.novak@xxxxxxxxxxx; bbakshan@xxxxxxxxx; bertsimonovich@xxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: An Article on what ground is
Here is an article that is a well controlled test of right angle bends and the
evidence is clear that for all the frequencies that we encounter in digital
systems right angle bends are not visible.
90 Degree Corners, the Final Turn- Doug Brooks Article on effects of 90 corners
on EMI and SI
It was published in the January 1998 issue of Printed Circuit Design and the
testing was done by Todd Hubing at the EMC lab I University of Missouri Rolla.
As to energy leaking out the edges of a multilayer PCB here is laboratory
testing of that idea.
Fang, Jiayuan, et.al., "Effects of 20-H Rule and Shielding Vias on
Electromagnetic Radiation From Printed Circuit Boards", UC Santa Cruz,
Publishing date unknown.
If there is evidence to contradict these it is incumbent on those who make
those claims to show it. After all, that is what good engineering is all about.
Now to RF circuits and right angle bends. I have designed several high
power RF circuits and have always put a radius on all outside corners. That is
not because of a signal integrity problem. It is because of corona discharge
at sharp points. You will see this done on high power radios everywhere.
Again, it has nothing to do with right angle bends, it has to do with sharp
points, which right angle bends happen to have by coincidence.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Istvan Novak
Sent: Sunday, January 8, 2017 6:18 PM
To: leeritchey@xxxxxxxxxxxxx; bbakshan@xxxxxxxxx; bertsimonovich@xxxxxxxxxx
Cc: 'si-list' <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: An Article on what ground is
Lee,
I agree that in a number of situations without edge plating or via stitching
around the board edge
the system is fine, but I would not go as far as claiming that EMI does not
leak around board edges.
Tests can show that it does not happen (or is negligible) under the
circumstances of the particular
tests, but proving that something does not happen (or is negligible) under ALL
practical circumstances
would be a very challenging and extensive task.
This is similar to the discussions about right-angle bends: for various reasons
today on many of
the dense high-speed digital PCBs it is not an issue, but it does not mean that
the right-angle bend
does not create a discontinuity; it is just negligible today for narrow traces
on dense boards.
Under different circumstances, on low-density RF and microwave boards, people
need to
consider the effect of right-angle bends and junctions.
Respectfully,
Istvan Novak
Oracle
On 1/8/2017 8:16 PM, Lee Ritchey wrote:
As I think I said in another reply, edge plating and rows of vias arechassis?
around the edge of a PCB is akin to elephant repellant. They are not
of any value. There are tests that show that EMI does not "leak" out
the edges of multilayer PCBs which is what this is supposed to prevent.
If anyone wants to know what I am referring to elephant repellant is
the punch line to an old joke.
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Boris Bakshan
Sent: Saturday, January 7, 2017 11:28 AM
To: bertsimonovich@xxxxxxxxxx
Cc: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>; si-list
<si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: An Article on what ground is
Hi Bert,
2 questions please:
1. Edge plating increase costs. In your rich background, have you ever
encountered an EMI problem that stemmed from a non edge-plated
backplanes / daughter cards?
2. To confirm - Do you also recommend to implement a conductive
(logic) GND perimeter in each of the daughter cards in order to make a
conductive contact with the rails when inserting a daughter card into
the
Thank you.
On Sat, Jan 7, 2017 at 8:54 PM, Bert Simonovich
<bertsimonovich@xxxxxxxxxx>
wrote:
Boris,plated.
I have done essentially the same thing Lee has described in all of
the backplanes I have designed in the past, except that in our case
the outer PCB layers on both sides were "GND" plane, and the PCB was
edge
Thisisolation.
created a faraday shield for all the internal layers. The backplane
was metalically connected to the shelf framework with screws without
There was only one "GND" in the system, including the line cards thattelecommunications equipment.
plugged into the shelves.
This "grounding" scheme was compatible with single-point
ground/integrated bonding network (SPG/IBN) and mesh/common bonding
network(Mesh/CBN). Our systems had to meet GR-1089-CORE -
Electromagnetic compatibility and electrical safety for network
-48V Battery and Battery return powering the system was isolated fromground"
the "Chassis GND" with an option to join the battery return to
"chassis
at the single power entry point.the Faraday cage.
Regards,
Bert Simonovich
Signal/Power Integrity Practitioner | Backplane Specialist | Founder
LAMSIM Enterprises Inc.
Web Site: http://lamsimenterprises.com
Blog: http://blog.lamsimenterprises.com/
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On
Behalf Of Boris Bakshan
Sent: 7-Jan-17 1:16 PM
To: Lee Ritchey
Cc: si-list
Subject: [SI-LIST] Re: An Article on what ground is
Hi Lee,
Thank you for prompt reply.
So, in fact, you are making a direct connection between the logic
ground of the cards and the metalic chassis enclosure so that
backplane ground (return path of signals) , cards logic ground and
metalic chassis enclosure are all connected, did I get it right?
On Jan 7, 2017 7:57 PM, "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx> wrote:
Thanks for the nice feedback.
Aha! You have asked an EMI question! I use the ground plane in a
backplane as one side of my Faraday cage. Where that backplane
meets the flanges on the card cage, I leave the copper on the top
layer and connect that with vias to the ground plane in the
backplane. Now, there is the one connection between logic ground
and
cage.There can be no other connections such as on face places if one is
to avoid "leaking" at the cracks which is a common complaint when
more than one connection is made between logic ground and the
Faraday
Notice, I did not use the phrase "chassis ground" in this discussion.
I have used this method in dozens of systems with very good EMI results.
Hope this helps.
Lee
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On
Behalf Of Boris Bakshan
Sent: Saturday, January 7, 2017 5:24 AM
To: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
Cc: si-list <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: An Article on what ground is
Hi Lee,
Very good, comprehensive article, thank you.
What is your recommendation when it comes to backplanes? a backplane
is attached to the chassis with bolts/other conductive mechanical
parts. Do you recommend plating these PCB holes in the backplane? If
you do, should these holes be connected to (any) electrical net?
Thanks Lee.
On Fri, Jan 6, 2017 at 10:43 PM, Lee Ritchey
<leeritchey@xxxxxxxxxxxxx>
wrote:
I have written an article on ground following the brisk exchange on
this subject last month. I hope it clears up some of the confusion
around this subject.
Here is where it is on the web.
http://ubm.io/2ikEDat
Lee Ritchey
Speeding Edge
P.O. Box 2194
Glen Ellen, CA
95442
707-568-3983
I just used the energy it takes
To get mad and wrote some blues.
Count Basie
Or:
Worry is like a rocking chair,
It keeps you busy but.
It doesn't get you anywhere.
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