[SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
- From: Istvan Novak <istvan.novak@xxxxxxxxxxx>
- To: Joel Brown <joel@xxxxxxxxxx>
- Date: Wed, 12 Mar 2008 20:40:04 -0400
Joel,
Yes, it has been used in products for many years, and tens of thousands
of systems
out in the field employ this solution.
Interestingly, ESR and ESL have different considerations in terms of
what value you
want to target for. ESL is simple, because the lower it is, the better
is the result. The
optimum value is zero, though for any given design there is a break-even
point, below
which lower ESL will give diminishing return. ESR is different: it
always has a non-zero
optimum. If our goal is to minimize the worst-case peak-to-peak
transient noise, it can
be achieved by creating a flat resistive impedance profile and then the
noise is simply
V(t)=I(t)*R. It is true that lower R results in lower noise, but R has
to be frequency
independent to maintain the lowest worst-case noise. If we just take
low-ESR capacitors,
creating a frequency-independent impedance profile becomes increasingly
hard.
ESR of MLCCs today approach a few milliohm values per part, and we
usually need
multiple capacitors. Unless our goal is to create sub-milliohm
impedance with the PDN,
raising the ESR of capacitors to the optimum value actually reduces the
noise voltage.
Regards,
Istvan Novak
SUN Microsystems
Joel Brown wrote:
> Is this method actually used in practice?
> I have never seen it used or seen any applications notes recommending it.
> I don't doubt that it has benefits.
> If you use R-C on a IC supply pin, isn't the R going to cause excessive
> voltage drop and noise due to the AC currents being consumed by the IC? I
> thought low ESR and low ESL are needed for bypassing IC power supply pins.
>
> Joel
>
>
> -----Original Message-----
> From: Istvan Novak [mailto:istvan.novak@xxxxxxxxxxx]
> Sent: Wednesday, March 12, 2008 6:05 AM
> To: Joel Brown
> Cc: si-list@xxxxxxxxxxxxx
> Subject: Re: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>
> Joel,
>
> Yes, I meant two discrete components: low-ESR MLCC and a discrete resistor
> in series.On medium and large boards still today the smallest part your
> assembly house might want to handle is the 0402 size, but if you make the
> layout to minimize the total loop size (nothing fancy, nothing exotic), you
> can achieve the resonance reduction shown in the published paper (measured
> on production boards).
>
> Interesting that you mention single pins. The R-C termination can be used
> for both area decoupling and single-pin decoupling. For area decoupling you
> start with the characteristic impedance of the plane shape and you match
> that value with the parallel equivalent of all of the Rs placed on the
> plane. For very small puddles or single-pin strip feeds you can safely use
> a single capacitor or R-C.
>
> Regards,
>
> Istvan Novak
> SUN Microsystems
>
> Joel Brown wrote:
>
>> Istvan,
>>
>> Just a few qusetions regarding your comments:
>>
>> By adding discrete resistors do you mean add them in series with
>> normal low ESR ceramic capacitors?
>> If 0402 packages are used for both would the inductance be sufficiently
>>
> low?
>
>> I assume the higher ESR bypassing should be done as percentage of the
>> total bypassing and should not be used to bypass local IC power pins?
>>
>> Thanks - Joel
>>
>>
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
>> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Istvan Novak
>> Sent: Tuesday, March 11, 2008 6:04 AM
>> To: steve weir
>> Cc: Joel Brown; leeritchey@xxxxxxxxxxxxx; 'Scott McMorrow'; 'QU
>> Perry'; si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>>
>> Joel,
>>
>> Just a few late comments to the thread (I was on vacation):
>>
>> - setting the resistance to dampen resonances is a useful thing to
>> reduce worst-case transient noise and EMI risk. For regular MLCCs
>> this usually requires ESR values higher than what we get with a
>> typical manufacturing process today.
>>
>> - in ceramic capacitors the required resistance can be created either
>> by a smart internal construction (see the TDK announcement pointed out
>> on the thread), or by adding resistance externally such as printed
>> resistors (such as Sanmina's annual ring resistor) or by adding
>> discrete resistor pieces
>>
>> - as it was mentioned, inductance is crucial: whether the resistance
>> is added inside the MLCC or externally, we should not add too much
>> inductance as it would defeat the purpose. Fortunately each of the
>> above three approaches can be implemented with sufficiently low
>>
> inductance.
>
>> - for implementation options and simulated measured results you can
>> see some of the published papers on the topic. See for instance:
>> "Overview of Some Options to Create Low-Q Controlled-ESR Bypass
>>
> Capacitors"
>
>> and "History of Controlled-ESR Capacitors at SUN" in TecForum TF-MP3
>> "Controlled-ESR Bypass Capacitors Have Arrived" on
>> http://home.att.net/~istvan.novak/papers.html
>>
>> Finally another comment on inductance: instead of setting the
>> resistance to the optimum value, sufficiently low overall inductance
>> of the bypass capacitors can also be used to reduce/eliminate
>> resonances. This is the rational (knowingly or unknowingly) behind
>> the approach Charles mentioned (sprinkling the board with a lot of
>>
> capacitors) and this is
>
>> the reason why lower inductance parts are always a welcome help.
>> However, from a design point of view we need to keep in mind that
>> using a low cumulative inductance instead of the optimum resistance
>> comes with a
>> price: either the low-inductance parts are more expensive, or the
>> low-inductance parts require more vias, or simply we need more parts.
>> Of course setting the resistance to the proper value has its own price
>> tag as well, so eventually the design engineer has to make the
>> decision which solution fits bets his/her requirements. Typically in
>> low-density and low-cost systems adding more capacitors works well; in
>> high-density and/or high-performance systems selecting PDN components
>> with the proper resistance becomes more attractive.
>>
>> Regards,
>>
>> Istvan novak
>> SUN Microsystems
>>
>>
>> steve weir wrote:
>>
>>
>>> Joel, controlled / high ESR caps are rare birds. Istvan has been
>>> championing them for years nd some parts have been made. If you are
>>> prepared to buy 100,000,000 at a shot you might get somewhere w/ the
>>> manufacturers. But right now, most are running their lines to
>>> capacity w/ commodity parts.
>>>
>>> Regards,
>>>
>>>
>>> Steve.
>>> Joel Brown wrote:
>>>
>>>
>>>
>>>> While we are all talking about bypass caps, I just got done reading
>>>> a book by Bruce Archambeault called "PCB Design for Real-World EMI
>>>> Control". In the book there is a chapter on bypassing and it shows
>>>> measurements from actual test boards. In one case, a certain
>>>> percentage
>>>>
>>>>
>> of the caps are "high ESR"
>>
>>
>>>> which seems to result in substantial damping (reduction) of the
>>>>
>>>>
>> resonances.
>>
>>
>>>> The high ESR caps are described as ceramic capacitors with a series
>>>> resistor built into the package, I have been unable to find such a
>>>> part. Has anybody found a benefit to this approach and a source for
>>>> high
>>>>
>>>>
>> ESR capacitors?
>>
>>
>>>> Thanks - Joel
>>>>
>>>>
>>>>
>>>>
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