[SI-LIST] Re: [!! SPAM] Re: 6 layers stackup

Tom, I am full agreement with Lee that data sheet "capacitor only" 
inductance values are not useful for bypass applications.  For power 
bypass, designers need to know what the inductance is of the combined 
capacitor and attachment structure to the plane cavity: wherever that 
may be.  The "bulldozer" here is not the length of the vias, but the 
combination of lightly loaded cavities and test fixtures that are not 
deembedded.  Lee and John's good intention was to measure actual 
attached capacitor performance.  For the reasons stated in my earlier 
message, the test fixture is not suitable to doing that with any good 
accuracy.  Further, John's choice of an absolutely ridiculous via and 
surface connection pattern for the X2Y(r) cap severely skewed their 
results.

The bone of contention is that Lee professes the belief that low 
inductance caps get hobbled by vias to the extent that their replacement 
ratio over regular caps doesn't hold in a conventional PCB.  We have 
proven that belief false for any well-designed via attachment pattern.  
More importantly, we have proven that the impact of via length: that is 
the total inductance added per unit length multiplied by the number of 
vias used is substantially better with X2Y(r) caps than it is with 
conventional 0402s.  What that means is that to get to a given 
inductance target, the replacement ratio of X2Y(r) type capacitors to 
conventional 0402s does not significantly degrade with distance from the 
capacitor mounting surface to the attached cavity.   At any inductance 
target, and for any distance from the capacitor surface to the power 
cavity, X2Y(r) capacitors require fewer total vias than conventional 
0402 or 0603 capacitors.  Charts for attached inductance versus cavity 
depth for various types of capacitors including X2Y(r)s can be found in 
application notes on the X2Y(r) web site:  www.x2y.com/bypass.htm.

In order to fix Lee's fixture, he needs to do a couple of things: 

1) Fix the areal density of capacitors to be representative of intended 
design practice.  This will fix the impedance and PRF.
2) Device a way to deembed his fixture from the what he is measuring.

I have no doubt that once that is done, Lee will obtain the same or very 
similar results to those that we report.

Best Regards,


Steve.

Tom Biggs wrote:
> You can take the bulldozer analogy two ways. It depends on whether you
> care about the weight of the bulldozer with passengers, or just the
> weight of the passengers.
>
> Steve's test fixture was geared toward 'weighing the passengers'. Lee's
> was toward 'weighing the bulldozer'. So they each served their purpose.
> His whole point was that the vias going down 50 mils on a board are
> going to swamp out the advantages of low inductance caps. His test
> fixture, by design, had vias that go down 50mils. I'm sure he'd agree
> that this would be a bad fixture for measuring the cap itself, which was
> not his goal.
>
> The appropriate land pattern to use for the low-inductance caps is a
> separate issue. I'd be curious to see Lee's board with Steve's land
> pattern.
>
>     -tom
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Muranyi, Arpad
> Sent: Tuesday, February 26, 2008 1:31 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>
> Can't resist to illustrate this with an example:
>
> If you want to compare the weight of an ant and a cricket and you put
> them on top of the same bulldozer, you will not see much difference in
> their weight...
>
> Arpad
> ------------------------------------------------------------------------
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Lee Ritchey
> Sent: Tuesday, February 26, 2008 11:16 AM
> To: Charles Grasso; Scott McMorrow
> Cc: Steve Weir; QU Perry; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>
> What does the test vehicle have to do with it?  Both capacitors are
> seeing
> the same stackup.  It's apples and apples.   Why 26 layers?  Lots of
> PCBs
> have 26 layers, pretty much all of them in terabit routers.  This PCB
> was used to test may things besides these two capacitors.
>
> What is being presented is the difference between the two capacitors
> under the same set of test conditions and it is not much.
>
> There are two sets of tests.  One with the capacitors connected to the
> first two planes inside the PCB, which is the lowest added inductance
> and the other is with the capacitors attached to two planes further down
> in the PCB.
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