[SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
- From: "Tom Biggs" <tbiggs@xxxxxxxxxxxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 26 Feb 2008 17:52:55 -0800
You can take the bulldozer analogy two ways. It depends on whether you
care about the weight of the bulldozer with passengers, or just the
weight of the passengers.
Steve's test fixture was geared toward 'weighing the passengers'. Lee's
was toward 'weighing the bulldozer'. So they each served their purpose.
His whole point was that the vias going down 50 mils on a board are
going to swamp out the advantages of low inductance caps. His test
fixture, by design, had vias that go down 50mils. I'm sure he'd agree
that this would be a bad fixture for measuring the cap itself, which was
not his goal.
The appropriate land pattern to use for the low-inductance caps is a
separate issue. I'd be curious to see Lee's board with Steve's land
pattern.
-tom
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Muranyi, Arpad
Sent: Tuesday, February 26, 2008 1:31 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
Can't resist to illustrate this with an example:
If you want to compare the weight of an ant and a cricket and you put
them on top of the same bulldozer, you will not see much difference in
their weight...
Arpad
------------------------------------------------------------------------
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Lee Ritchey
Sent: Tuesday, February 26, 2008 11:16 AM
To: Charles Grasso; Scott McMorrow
Cc: Steve Weir; QU Perry; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
What does the test vehicle have to do with it? Both capacitors are
seeing
the same stackup. It's apples and apples. Why 26 layers? Lots of
PCBs
have 26 layers, pretty much all of them in terabit routers. This PCB
was used to test may things besides these two capacitors.
What is being presented is the difference between the two capacitors
under the same set of test conditions and it is not much.
There are two sets of tests. One with the capacitors connected to the
first two planes inside the PCB, which is the lowest added inductance
and the other is with the capacitors attached to two planes further down
in the PCB.
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