[SI-LIST] Re: Decoupling capacitors
- From: Wayne Cooke <wcooke@xxxxxxxxxxxxx>
- To: 'Doug Brooks' <doug@xxxxxxxxxx>,"'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 23 May 2002 13:13:36 -0400
Hi Doug,
I read your article, and tried out the decoupling capacitor program you have
on your website. What concerns me is that while it is possible to reduce
the resultant impedance of certain frequencies by combining different
capacitor values, you will be making another group of frequencies worse. In
the capacitor combinations that I simulated with, the frequencies above the
resulting parallel resonance point were improved, at the expense of the
frequencies below the parallel resonance point. To make the improvements
better at the high end by reducing decoupling capacitor values, you will be
increasing the amplitude of the parallel resonance. And unfortunately, the
parallel resonance has a rather wide span of around 100MHz, so you are
pretty much guaranteed to have a harmonic fall into this resonance point.
This is why I like 0603 sized ceramic 0.1uF caps for decoupling, any
parallel resonance created with the interaction of this cap to the larger
caps on the board will be below 30MHz, which is the low frequency cutoff for
radiated emission testing.
You may be able to find an application for adding a low valued ceramic cap
for decoupling if you have a specific radiated emission frequency that you
need to reduce, and the other frequencies below this frequency are all quite
low. This would be a fix done after radiated emission testing, and not
designed in up front. I would much rather start without any parallel
resonance issues with my decoupling strategy to begin with (outside of the
inevitable low frequency resonances and the interaction of the planes within
the PCB), and then possibly tweak this in the lab if there are any issues.
Specctraquest has a power integrity option which allows the simulation of
parallel resonaces of capacitor decoupling, which also accounts for
propagation delay between the capacitors. It uses a multinode mesh of
transmission lines to model the decoupling capacitor system. I haven't had
a chance to use it, but it sounds like a good strategy for modelling
decoupling capacitors as a complete system, taking into account capacitor
locations as well as capacitor values. Has anybody in this group had a
chance to use this?
Wayne Cooke
Signal Integrity Engineer, Innovance Networks
19 Fairmont Ave., Ottawa, Ont. K1Y 1X4
email: wcooke@xxxxxxxxxxxxx
-----Original Message-----
From: Doug Brooks [mailto:doug@xxxxxxxxxx]
Sent: Wednesday, May 22, 2002 6:29 PM
To: wcooke@xxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: Re: Decoupling capacitors
At 10:34 AM 5/21/2002 -0400, Wayne Cooke wrote:
>Hello all,
>
>I have had quite alot of grief with using small valued ceramic capacitors
>(in the 100pF-1000pF range) in parallel with large valued capacitors due to
>the parallel resonant tank circuits that are caused by the interaction of
>the capacitor parasitics. This would cause our products to fail radiated
>emissions, and tweaking the capacitor values would only cause the resonant
>point to shift -- improving one harmonic but making another even worse.
Actually, when you shift resonant points, some really interesting (and
helpful) things can happen. If you have not seen our article on bypass caps
and the influence of ESR and self resonant frequencies on the impedance
characteristics of the power system, you might find it helpful. You can
find it on our web site at www.ultracad.com.
Doug Brooks
____________________________________________________________________________
___
UltraCAD Design announces availability of its new book "Signal Integrity
Issues in PCB Design"
Details at www.ultracad.com
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