[ibis-macro] Re: Epiphany

  • From: Bob Ross <bob@xxxxxxxxxxxxx>
  • To: twesterh@xxxxxxxxx
  • Date: Wed, 01 Feb 2006 09:01:22 -0800

Todd:

Details - should put your name as author since this will be
stored as westerhoff.pdf, etc.

Looks OK, but not clear why two vendors are listed with no checks.
need some footnote or explaination that they would probably
use a SPICE mapping solution (substitution), but still could
be supported.

Slide 11 - ok, but could correct the syntax in the boxes,
but not critical.

Bob

Todd Westerhoff (twesterh) wrote:

Take a look at slide 4.
It occurred to me that the vendor / tool / language matrix was better suited to describing why we picked the approach we did. As such, I've removed the "substitution" column and moved it forward in the presentation.
- It now explains why we picked Verilog-A as our initial implementation language (most tool support)
- It also explains why we needed VHDL-AMS support (key vendor support)
- Adding Sigrity and Apsim shows why we needed a substitution scheme and, by extension, adherence to basic SPICE element types
Comments are welcome and appreciated.
Todd.


Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave
Boxboro, MA 01719
email:twesterh@xxxxxxxxx
ph: 978-936-2149
____________________________________________
"Always do right.
This will gratify some people and astonish the rest."
- Mark Twain

-- Bob Ross Teraspeed Consulting Group LLC Teraspeed Labs 121 North River Drive 13610 SW Harness Lane Narragansett, RI 02882 Beaverton, OR 97008 401-284-1827 503-430-1065 http://www.teraspeed.com 503-246-8048 Direct bob@xxxxxxxxxxxxx

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