This looks good to me. Do I remember Ian volunteered to make copies (or
have them made)?
Any comments or changes, please respond by 5PM (EST) today - no replies
by then, we release the file for duplication.
Bob, I will forward a .pdf separately for posting on the web site.
Todd.
Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave
Boxboro, MA 01719
email:twesterh@xxxxxxxxx
ph: 978-936-2149
____________________________________________
"Always do right.
This will gratify some people and astonish the rest."
- Mark Twain
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Mike LaBonte
(milabont)
Sent: Thursday, February 02, 2006 10:08 AM
To: ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Re: Epiphany
Here is Todd's presentation with the last 2 slides deleted and the
VA/VHD/SPICE code snippets on slide 8 revised to reflect the real
languages. I had to use an ellipses to make VHDL fit.
Mike
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Todd Westerhoff
(twesterh)
Sent: Wednesday, February 01, 2006 4:49 PM
To: ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Re: Epiphany
Okay, fair enough. Let's try the attached. It may not be as intriguing
as the earlier version, but it still gets the point across ... and I
like avoiding the entanglement of being seen as making representations
about EDA tools.
Again, comments are welcome and appreciated.
Todd.
P.S. The last two slides go away for the published version - I just
avoided deleting it until we agree we want it gone.
Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave
Boxboro, MA 01719
email:twesterh@xxxxxxxxx
ph: 978-936-2149
____________________________________________
"Always do right.
This will gratify some people and astonish the rest."
- Mark Twain
-----Original Message-----
From: Bob Ross [mailto:bob@xxxxxxxxxxxxx]
Sent: Wednesday, February 01, 2006 4:12 PM
To: Todd Westerhoff (twesterh)
Cc: ibis-macro@xxxxxxxxxxxxx
Subject: Re: [ibis-macro] Re: Epiphany
Todd:
The presentation content (especially with vendor names needs to be
clear. While your intent seems reasonable, it is more important to be
absolutely clear and non-judgemental regarding and vendor name. Verbal
clarification is insufficient for published material.
Without clarification, the blank leaves a negative connotation for those
vendors listed. That is why you should either clarify, remove the
names, disquise the names, (vendor 1, vendor 2), or add the substitution
checks as a reasonalbe alternative.
This is the issue. Be careful what you say when you list vendor names.
Or remove that slide entirely.
Bob
Todd Westerhoff (twesterh) wrote:
The question of "what do we do for the vendors where everything is
blank?" is EXACTLY what I want the viewer to ask. There are two
questions that should arise from the slide:
1) If we pick Verilog-A, what about the VHDL-AMS only vendors?
2) No matter what we pick, what about vendors without -A or -AMS
support?
Remember the slide appears before we introduce the macro approach, as
part of the description of the problem. I'm suggesting that our
approach to multiple language support arises in response to the
natural questions posed by slide 4.
I'll change the slide if the group wants, but I actually think it's
simpler and more straightforward this way ("this is the problem we
were up against"). The other thing that deleting the substitution
column did was eliminate the issue of whether we were declaring
vendor's future plans or not. The slide simply shows current tool
language support as represented by the vendors.
Comments are welcome and appreciated.
Todd.
Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave
Boxboro, MA 01719
email:twesterh@xxxxxxxxx
ph: 978-936-2149
____________________________________________
"Always do right.
This will gratify some people and astonish the rest."
- Mark Twain
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Muranyi, Arpad
Sent: Wednesday, February 01, 2006 12:04 PM
To: ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Re: Epiphany
I tend to agree with Bob's opinion that something should be mentioned
about substitution on that chart.
It looks empty this way begging the question why those vendors/tools
are listed then...
Arpad
======================================================
-----Original Message-----
From: ibis-macro-bounce@xxxxxxxxxxxxx
[mailto:ibis-macro-bounce@xxxxxxxxxxxxx] On Behalf Of Bob Ross
Sent: Wednesday, February 01, 2006 9:01 AM
To: twesterh@xxxxxxxxx
Cc: ibis-macro@xxxxxxxxxxxxx
Subject: [ibis-macro] Re: Epiphany
Todd:
Details - should put your name as author since this will be stored as
westerhoff.pdf, etc.
Looks OK, but not clear why two vendors are listed with no checks.
need some footnote or explaination that they would probably use a
SPICE mapping solution (substitution), but still could be supported.
Slide 11 - ok, but could correct the syntax in the boxes, but not
critical.
Bob
Todd Westerhoff (twesterh) wrote:
Take a look at slide 4.
It occurred to me that the vendor / tool / language matrix was better
suited to describing why we picked the approach we did. As such, I've
removed the "substitution" column and moved it forward in the
presentation.
- It now explains why we picked Verilog-A as our initial
implementation language (most tool support)
- It also explains why we needed VHDL-AMS support (key vendor support)
- Adding Sigrity and Apsim shows why we needed a substitution scheme
and, by extension, adherence to basic SPICE element types
Comments are welcome and appreciated.
Todd.
Todd Westerhoff
High Speed Design Group Manager
Cisco Systems
1414 Massachusetts Ave
Boxboro, MA 01719
email:twesterh@xxxxxxxxx
ph: 978-936-2149
____________________________________________
"Always do right.
This will gratify some people and astonish the rest."
- Mark Twain
--
Bob Ross
Teraspeed Consulting Group LLC Teraspeed Labs
121 North River Drive 13610 SW Harness Lane
Narragansett, RI 02882 Beaverton, OR 97008
401-284-1827 503-430-1065
http://www.teraspeed.com 503-246-8048 Direct
bob@xxxxxxxxxxxxx
Teraspeed is a registered service mark of Teraspeed Consulting Group
LLC
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--
Bob Ross
Teraspeed Consulting Group LLC Teraspeed Labs
121 North River Drive 13610 SW Harness Lane
Narragansett, RI 02882 Beaverton, OR 97008
401-284-1827 503-430-1065
http://www.teraspeed.com 503-246-8048 Direct
bob@xxxxxxxxxxxxx
Teraspeed is a registered service mark of Teraspeed Consulting Group LLC
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