[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator
- From: "Abe Riazi" <ariazi@xxxxxxxxxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 13 Aug 2003 19:56:14 -0700
Kim Flint Wrote:
>
>
>
>The simulations I did tend to lend credence to the idea that you shouldn't
>rely on rules of thumb or absolute statements. You need to consider your
>application! And simulate! Because from what I interpret from the results,
>sometimes the cap locations matter and sometimes they don't. It is no more
>correct to say "location never matters" then it is to say "location always
>matters."
>
>
>
>thanks,
>kim
>
It would be interesting to know if simulations utilizing a program other than
Sigrity's Speed2000 that you have used, such as Cadence Power Integrity tool,
also lead
to conclusions similar to your findings.
Regards,
Abe
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