Hello! Many disscussion were over about Spice to IBIS conversion. But I can't find the exact answer about below problem. If the Spice Model of one I/O buffer model has a clock pin, and the output is synchronouse by that clock, in the spice simulation for I/V curve we need to add the clock stimulus and .Tran analysis, right? But simulation for I/V curve, we should sweep the voltage at I/O pad from -Vcc to 2Vcc. This is .DC analysis right? In spice simulation can we simultaneously simulate .DC and .Tran ? That is confusing.... Thanks alot! ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu