[SI-LIST] Re: Setup-Hold Equations for Source Synchronous Design
- From: "Clewell, Craig" <Cclewell@xxxxxxxxxxxxx>
- To: "'nrpatel@xxxxxxxxxxx'" <nrpatel@xxxxxxxxxxx>
- Date: Mon, 14 Aug 2006 15:31:00 -0400
Try Digital Techniques for High-Speed Design ~ Tom Granberg
ISBN#0-13-142291-X
-----Original Message-----
From: nrpatel@xxxxxxxxxxx [mailto:nrpatel@xxxxxxxxxxx]
Sent: Monday, August 14, 2006 3:14 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Setup-Hold Equations for Source Synchronous Design
Hello all,
Can someone point me out to a good reference that explains the setup and
hold margin calculations for a source synchronous design like DDR?
Did not have much luck googling.
Thanks,
Nikhil
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