[SI-LIST] Re: Ringing in Return Loss data

  • From: Istvan Novak <istvan.novak@xxxxxxxxxxx>
  • To: qazi <qazi@xxxxxxxxxx>
  • Date: Wed, 27 Aug 2008 09:02:28 -0400

Qazi,

I dont recall off-hand how the popular SI books address this question.  
Surely you will find the
fundamental pieces to the answer in most books, though you may need to 
put the final answer
together yourself.

Return loss basically measures the voltage reflection coefficient of the 
interconnect with all other ports
matched terminated, so you are looking at one of the main diagonal 
elements of the S matrix. If your
network is a single uniform interconnect, you have two ports, and the 
return loss measures input
reflection with matched termination at the other end.  From basic 
transmission-line theory we know
that the standing-wave pattern is periodical with half wavelength 
periodicity.  This also means that
at every integer multiple of frequency where the physical length equals 
half of the wavelength, the
transmission line electrically 'disappears' and it copies the load 
impedance over to its input.  With
matched load for measuring return loss, it means that at all of these 
frequencies the input reflection
becomes zero, even if the transmission line otherwise is badly 
mismatched. In between, at odd
multiples of the quarter-wave frequency, the input reflection reaches 
its peaks.  These peaks
can be zero only in ideal lossless matched transmission lines; in real 
interconnects the characteristic
impedance is frequency dependent.  If the transmission line is good, 
these peaks will be very small,
but no no matter how small peaks you have, those still create a very 
visible ripple-looking
response with the zeros in between.  For frequency-dependent 
characteristics of the interconnects
you will find a lot of excellent details in Howard Johnson's second book.

Regards,

Istvan Novak
SUN Microsystems


qazi wrote:
> Thank you guys. Yes I do not have any mismatch in routing other than that
> the phase matching of the P and N of the pairs are slightly out of sync. It
> is on the order of .03" and that is the only mismatch I see in the design.
> Istvan, do you have any reference document for the effect that you
> mentioned? I would like to read this in little bit details.
>
> -Qazi
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of istvan Novak
> Sent: Monday, August 25, 2008 7:35 PM
> To: 'qazi'
> Cc: Jimmy; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Ringing in Return Loss data
>
> Qazi,
>
> Just to clarify: if this is Return Loss and not Insertion Loss, the 
> periodic ripple (ringing) is inevitable.
> Actually it is inevitable in both, just in Insertion Loss it is hardly 
> visible if the trace is close enough
> to the reference impedance.  Return Loss, on the other hand, 
> periodically drops to zero (minus
> infinite on the dB scale), wherever the frequency corresponds to 
> multiples of half wavelength
> over the trace length.  At even multiples of quarter-wave resonance the 
> Return Loss reaches its
> maximum.  Unless the trace is completely ideal, we can not get a 
> frequency independent characteristic
> impedance, so even if the trace's characteristic impedance is close to 
> the reference impedance, the
> nulls at multiples of the half-wavelength resonance make the remaining 
> small mismatch very obvious.
> The Insertion Loss, on the other hand, will 'flatten out' to the naked 
> eye if the characteristic impedance
> comes to within a couple of percent of the reference impedance.
>
> Regards,
>
> Istvan Novak
> SUN Microsystems
>  
> Jimmy wrote:
>   
>> As Steve stated, you have a mismatch somewhere in your routing. Suggest
>>     
> you
>   
>> look at layer changes and number of VIAs in each of the diff pair to see
>>     
> if
>   
>> both are the same. If they do change layers, check how that changes
>> regarding your planes and there distance from them. Check the driver
>> strength so see if these are being overdriven and you are having ring back
>> from undershoot/overshoot. Lastly, if you can find nothing wrong question
>>     
> if
>   
>> all the input into the simulator is correct.
>>
>> Omega
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>>     
> On
>   
>> Behalf Of qazi
>> Sent: Monday, August 25, 2008 8:20 PM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Ringing in Return Loss data
>>
>> Gurus,
>> I can explain ringings on a TDR data but can anyone tell me why I am
>>     
> seeing
>   
>> this on a Return Loss data for a layout that is geometrically correctly
>> done?
>> This is a simulation result based on a .brd file in allegro and I was
>> wondering if I was doing something wrong here as far as modeling the
>>     
> device
>   
>> or the SMAs. This board uses Fr-4 and the traces are around 4.5 inches
>>     
> long
>   
>> diff pairs. I know the impedances are kept constant (same geometry)
>> throughout the whole path and return path is ideal.
>> Rgds,
>> Qazi
>>
>>
>>
>>   
>>     
>
>   

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