[SI-LIST] Re: Ringing in Return Loss data

  • From: "Jimmy" <jimds@xxxxxxxxxx>
  • To: "'qazi'" <qazi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 25 Aug 2008 21:08:35 -0500

As Steve stated, you have a mismatch somewhere in your routing. Suggest you
look at layer changes and number of VIAs in each of the diff pair to see if
both are the same. If they do change layers, check how that changes
regarding your planes and there distance from them. Check the driver
strength so see if these are being overdriven and you are having ring back
from undershoot/overshoot. Lastly, if you can find nothing wrong question if
all the input into the simulator is correct.

Omega

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of qazi
Sent: Monday, August 25, 2008 8:20 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Ringing in Return Loss data

Gurus,
I can explain ringings on a TDR data but can anyone tell me why I am seeing
this on a Return Loss data for a layout that is geometrically correctly
done?
This is a simulation result based on a .brd file in allegro and I was
wondering if I was doing something wrong here as far as modeling the device
or the SMAs. This board uses Fr-4 and the traces are around 4.5 inches long
diff pairs. I know the impedances are kept constant (same geometry)
throughout the whole path and return path is ideal.
Rgds,
Qazi



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