*From*: steve weir <weirsi@xxxxxxxxxx>*To*: "Bowden, Ivor" <ibowden@xxxxxxxxxxxxxxxxx>*Date*: Sat, 29 Mar 2008 03:00:27 -0700

Ivor, you can find examples in papers by people like Larry, Istvan, and=20 books that are out there. But, I am not sure where you are going with=20 this. Since terms like "well fed" are ambiguous, I don't know what=20 example you are looking for or to what purpose. My sense is that you=20 have a belief that if one follows some ambiguous "industry practices"=20 that the PDN will usually "work fine". Undefined engineering leads to=20 undefined results. If you want predictable results then: Define the=20 requirements and engineer to them.=20 We can characterize components to determine their actual power delivery=20 requirements. Once known we can easily demonstrate failures that result = when we don't meet those requirements. It is also easy to demonstrate=20 what different PDN practices do to the impedance profile under any=20 particular set of controlled circumstances we wish to create. If you want to see resonance effects for yourself then: Design some=20 board following one of the popular ad-hoc rules. If for example you=20 design a board with one 0402 capacitor every two square inches and the=20 plane cavity is 4mil FR406 on layers 2/3, the bypass to cavity PRF will=20 land around 330MHz depending on how you do your vias. If the planes are=20 deeper in the board that frequency will just go down. Then get yourself = a programmable clock generator and use it to drive some device like a=20 PLD or FPGA with a bunch of outputs simultaneously in a simple 1-0-1-0=20 sequence while you monitor the power supply planes with a decent scope. = Just step frequency until the bit rate / 2 excites the lowest parallel=20 resonance in the power system. After that experiment see if your=20 feelings about what works fine are still the same. Steve Bowden, Ivor wrote: > Hi Gil, > =20 > > Thanks for sharing. > > =20 > > By "real world" I do not mean rules of thumb and shortcuts, I mean exam= ples. I expect that most folks on this list, especially those for whom SI= is primary activity, can demonstrate examples of operational failures du= e to bad board layout. I also know that a large number of designs never g= et PDS analysis, yet work fine. I'm interested in typical modern technolo= gy designs that are laid out in standard industry practice: contiguous gr= ound planes, tandem heavy split power planes not used as return reference= , plenty of properly located bypass caps, etc that have operational failu= res which could have been pre-determined by PDS analysis, and if so, how = did that operational failure manifest? For example, it would be interesti= ng to see a scope (or simulation) snap shot of the voltage measured direc= tly across vias to contiguous well fed planes as a device current require= ment approaches the planes resonant frequency. And I mean a real device, = not a hypothetical entity tuned to instigat > e the problem. > > =20 > > -Ivor > > =20 > > -----Original Message----- > From: Gil Simsic [IEEE] [mailto:gsimsic.ieee@xxxxxxxxxxxxx]=20 > Sent: Friday, March 28, 2008 1:08 PM > To: Bowden, Ivor; si-list@xxxxxxxxxxxxx > Subject: Re: [SI-LIST] Re: PDS analysis? > > =20 > > Ivor > > =20 > > I am involved in design since 1993, and have numerous of successful des= igns=20 > > under my belt. (I know - not very humble...) > > =20 > > In one way or another I worked and learned from SI leaders (aka - gurus= )=20 > > like Lee Ritchey, Istvan Novak, Eric Bogatin, Scott McMorrow and Howard= =20 > > Johnson (and others that due to a senior moment I did not mention here = -=20 > > sorry) I gratefully owe my knowledge to them. > > =20 > > by the way - all I tried to do is to learn about "real world picture". > > =20 > > My greatest lesson is - there are no short cuts and no rule of thumbs. = I=20 > > read daily emails on this list that prove this point over and over agai= n. > > =20 > > And than again I might misunderstand you... > > If the by 'real world' you refer to 'rules of thumbs' and 'short cuts',= I=20 > > will strongly recommend you to shy away from that 'real world'. I reall= y=20 > > think that any design as hypothetic or rhetorical as it is, needs analy= sis=20 > > (the subject of your email is PDS analysis...). > > =20 > > Most of the SI phenomena are frequency depended. > > =20 > > You said - * I'm more interested in answers like "you might see a wavef= orm=20 > > of xxx characteristics across the bypass capacitor". * > > My answer - "you might see a waveform of xxx characteristics across the= =20 > > bypass capacitor". ;-) > > How can one attempt giving you any 'ball-park' numbers for a frequency = > > dependent component with out knowing what the frequency parts are? > > =20 > > Good luck! > > =20 > > Gil > > ----- Original Message -----=20 > > From: "Bowden, Ivor" <ibowden@xxxxxxxxxxxxxxxxx> > > To: <si-list@xxxxxxxxxxxxx> > > Sent: Friday, March 28, 2008 12:11 PM > > Subject: [SI-LIST] Re: PDS analysis? > > =20 > > =20 > > =20 >> Hi, >> =20 > > =20 > > =20 > > =20 >> I'd like to thank everyone who replied so far, off and on the list. I = >> =20 > > =20 >> emphasize that this is a rhetorical question, it doesn't represent any= =20 >> =20 > > =20 >> specific product. I also emphasize that I'm interested more in the "re= al=20 >> =20 > > =20 >> world observation" part. Instead of answers like "your power plane may= =20 >> =20 > > =20 >> have a resonance at xxx frequency", I'm more interested in answers lik= e=20 >> =20 > > =20 >> "you might see a waveform of xxx characteristics across the bypass=20 >> =20 > > =20 >> capacitor". Also, this question is more about power distribution than = >> =20 > > =20 >> signal return path. All answers appreciated. >> =20 > > =20 > > =20 > > =20 > > =20 >> -Ivor >> =20 > > =20 > > =20 > > =20 > > =20 >> ________________________________ >> =20 > > =20 > > =20 >> From: Bowden, Ivor >> =20 > > =20 >> Sent: Friday, March 28, 2008 7:24 AM >> =20 > > =20 >> To: si-list@xxxxxxxxxxxxx >> =20 > > =20 >> Subject: PDS analysis? >> =20 > > =20 > > =20 > > =20 > > =20 >> Hi SI Experts, >> =20 > > =20 > > =20 > > =20 > > =20 >> Say you have a typical PCB with modern technology mix of CPU, DSP, DDR= ,=20 >> =20 > > =20 >> GIGE, PCIE, etc. Say it is a multi-layer stackup in the form of=20 >> =20 > > =20 >> GND-SIG-SIG-GND sets, with the power distribution centered in the stac= kup=20 >> =20 > > =20 >> as solid ground plane - split power plane - split power plane - solid = >> =20 > > =20 >> ground plane, using 1oz copper and 3.5 mil dielectric. Assuming the sp= lit=20 >> =20 > > =20 >> power planes utilize sufficient area to keep the point to point induct= ance=20 >> =20 > > =20 >> and resistance to reasonable values, and 0.1uF ceramic bypass caps are= =20 >> =20 > > =20 >> evenly placed at device pins, and bulk capacitance is placed as needed= ,=20 >> =20 > > =20 >> would there be reason to expect any problems, such as plane resonance,= =20 >> =20 > > =20 >> etc? If so, what would be the observable real world manifestations, in= =20 >> =20 > > =20 >> terms of circuit performance and power pins scope waveforms? Would the= re=20 >> =20 > > =20 >> be significant advantage to analyzing this PDS, or should following th= is=20 >> =20 > > =20 >> "industry standard practice" for PCB PDS be sufficient to expect robus= t=20 >> =20 > > =20 >> behavior? >> =20 > > =20 > > =20 > > =20 > > =20 >> Thanks, >> =20 > > =20 > > =20 > > =20 > > =20 >> Ivor Bowden >> =20 > > =20 > > =20 >> Senior Hardware Engineer >> =20 > > =20 > > =20 >> Curtiss-Wright Controls Embedded Computing >> =20 > > =20 > > =20 >> 10201 Wateridge Circle >> =20 > > =20 > > =20 >> Suite 300 >> =20 > > =20 > > =20 >> San Diego, CA 92121 >> =20 > > =20 > > =20 >> 858-452-0020 x 4405 >> =20 > > =20 > > =20 >> ibowden@xxxxxxxxxxxxxxxxx >> =20 > > =20 > > =20 > > =20 > > =20 > > =20 >> ______________________________________________________________________= _ >> =20 > > =20 >> This e-mail and any files transmitted with it are proprietary and inte= nded=20 >> =20 > > =20 >> solely for the use of the individual or entity to whom they are addres= sed.=20 >> =20 > > =20 >> If you have reason to believe that you have received this e-mail in er= ror,=20 >> =20 > > =20 >> please notify the sender and destroy this email and any attached files= =2E=20 >> =20 > > =20 >> Please note that any views or opinions presented in this e-mail are so= lely=20 >> =20 > > =20 >> those of the author and do not necessarily represent those of the=20 >> =20 > > =20 >> Curtiss-Wright Corporation or any of its subsidiaries. Documents atta= ched=20 >> =20 > > =20 >> hereto may contain technology subject to government export regulations= =2E=20 >> =20 > > =20 >> Recipient is solely responsible for ensuring that any re-export, trans= fer=20 >> =20 > > =20 >> or disclosure of this information is in accordance with applicable=20 >> =20 > > =20 >> government export regulations. The recipient should check this e-mail= and=20 >> =20 > > =20 >> any attachments for the presence of viruses. Curtiss-Wright Corporatio= n=20 >> =20 > > =20 >> and its subsidiaries accept no liability for any damage caused by any = >> =20 > > =20 >> virus transmitted by this e-mail. >> =20 > > =20 >> ------------------------------------------------------------------ >> =20 > > =20 >> To unsubscribe from si-list: >> =20 > > =20 >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field >> =20 > > =20 > > =20 >> or to administer your membership from a web page, go to: >> =20 > > =20 >> http://www.freelists.org/webpage/si-list >> =20 > > =20 > > =20 >> For help: >> =20 > > =20 >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field >> =20 > > =20 > > =20 > > =20 >> List technical documents are available at: >> =20 > > =20 >> http://www.si-list.net >> =20 > > =20 > > =20 >> List archives are viewable at: >> =20 > > =20 >> http://www.freelists.org/archives/si-list >> =20 > > =20 >> or at our remote archives: >> =20 > > =20 >> http://groups.yahoo.com/group/si-list/messages >> =20 > > =20 >> Old (prior to June 6, 2001) list archives are viewable at: >> =20 > > =20 >> http://www.qsl.net/wb6tpu >> =20 > > =20 > > =20 > > =20 > > > _______________________________________________________________________= > This e-mail and any files transmitted with it are proprietary and inten= ded solely for the use of the individual or entity to whom they are addre= ssed. If you have reason to believe that you have received this e-mail in= error, please notify the sender and destroy this email and any attached = files. Please note that any views or opinions presented in this e-mail ar= e solely those of the author and do not necessarily represent those of th= e Curtiss-Wright Corporation or any of its subsidiaries. Documents attac= hed hereto may contain technology subject to government export regulation= s. Recipient is solely responsible for ensuring that any re-export, trans= fer or disclosure of this information is in accordance with applicable go= vernment export regulations. The recipient should check this e-mail and = any attachments for the presence of viruses. Curtiss-Wright Corporation a= nd its subsidiaries accept no liability for any damage caused by any viru= s transmitted by this e-mail. > ------------------------------------------------------------------ > To unsubscribe from si-list: > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field > > or to administer your membership from a web page, go to: > http://www.freelists.org/webpage/si-list > > For help: > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > > > List technical documents are available at: > http://www.si-list.net > > List archives are viewable at: =20 > http://www.freelists.org/archives/si-list > or at our remote archives: > http://groups.yahoo.com/group/si-list/messages > Old (prior to June 6, 2001) list archives are viewable at: > http://www.qsl.net/wb6tpu > =20 > > > =20 --=20 Steve Weir Teraspeed Consulting Group LLC=20 121 North River Drive=20 Narragansett, RI 02882=20 California office (408) 884-3985 Business (707) 780-1951 Fax Main office (401) 284-1827 Business=20 (401) 284-1840 Fax=20 Oregon office (503) 430-1065 Business (503) 430-1285 Fax http://www.teraspeed.com This e-mail contains proprietary and confidential intellectual property o= f Teraspeed Consulting Group LLC -------------------------------------------------------------------------= ----------------------------- Teraspeed(R) is the registered service mark of Teraspeed Consulting Group= LLC ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: http://www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu

**Follow-Ups**:**[SI-LIST] Re: PDS analysis?***From:*Bowden, Ivor

**References**:**[SI-LIST] Re: PDS analysis?***From:*Bowden, Ivor

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