[SI-LIST] Re: Intel Motherboard with DDR2
- From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
- To: "'si-list@xxxxxxxxxxxxx '" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 17 Feb 2005 20:08:19 -0800
If you think about it, the pull up current is really split between the Vterm
(at the parallel terminator) and VDDQ (at the driver pull up). Even though
you can design a VRM that generate both and make them track each other at
low speed. At the fast signal edge rate, they are seperate quantities. So
how do you define return to power ?
The only way is to make the current return through ground. By heavily
decouple the driver on die and at the terminator and return the image
current through ground.
-----Original Message-----
From: Jon Keeble
To: si-list@xxxxxxxxxxxxx
Sent: 2/17/2005 6:22 PM
Subject: [SI-LIST] Re: Intel Motherboard with DDR2
I thought that the return current path into the chip depends on the
transition direction:
- low going, and the return current is in the GND pins
- hi going, and the return current is in the VCC pins
Whichever of GND/VCC is chosen as signal return, the return currents
have
different paths (one edge returns through bypass caps hopefully placed
at
the driver).
Maybe single ended fast signals could best be returned symmetrically
i.e.
midway between GND and VCC so the return paths for both edges are the
same.
However, this conflicts with
- DDR2 construction
- recommendations to keep DDR2 data away from VCC.
So I guess the Intel solution is good, so long as there are bypasses
near
the module connector that provide for the return currents to jump
planes.
Jon
Steve Weir said:
> And if the IC mfg. was
> smart enough to reference all of their fast I/Os to gnd, then we have
a
> nice smooth transmission line for each signal out of the package onto
the
> PCB. No muss, no fuss.
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