[SI-LIST] [Finding the impedance of a PCB trace

  • From: Graham Davies <GrahamDavies@xxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Sat, 30 Apr 2005 07:27:42 -0700


--- In si-list@xxxxxxxxxxxxxxx, steve weir <weirsi@xxxx> wrote:

> ... reduce the imbalance by
> changing from a solid fill 
> to a grid pattern ...

OK, I *am* understanding this correctly. Your advice is to sacrifice 
some distributed capacitance between the power and ground planes by 
gridding the power plane, thus reducing the amount of copper in it to 
better balance the routing layer opposite it.

I understand about stitching the two ground planes together with vias. 
I'm just wondering how much that will get in the way of routing and how 
to know if it is done adequately. Routing mainly on two layers on 
opposite sides of the same ground plane sounds attractive as it is 
harder to get the return paths wrong.

Graham.






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