[SI-LIST] Re: ESD simulations
- From: Yafei Bi <yafei_bi@xxxxxxxxx>
- To: starsilic@xxxxxxxxx, vats123@xxxxxxxxx, si-list@xxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Wed, 29 Nov 2006 08:28:06 -0800 (PST)
Hi, Canes,=0A=0AHspice is a general circuit simulator, if you have device m=
odels which model their behavior under ESD event sufficiently, then buildin=
g your (ESD stimulus+ESD protection Device or ESD protection Network, inclu=
ding the Package/loading/parasitic RCs) and simulation will give you some i=
nsight on whether the ESD Spec can be met.=0A=0AA lot of time, the models f=
or your ESD device are not included, or poorly modeled. Here the T-CAD can =
offer the help before you see the silicon, it can predict the I-V character=
istic of the ESD device. based on the T-CAD results, you can either write a=
AMS model or Spice Marcro-model to simulation in Hspice.=0A=0AGenerally, t=
hings to look for:=0AResistance of ESD path=0ACurrent handling capability o=
r EM compliance for the Metal wire/Contact=0AVoltage the gate of core logic=
transistor sees during ESD event to ensure the reliability of the transist=
or=0Aetc..=0A=0A=0ABest=0A=0AYafei=0A=0A----- Original Message ----=0AFrom:=
Canes Venatici <starsilic@xxxxxxxxx>=0ATo: vats123@xxxxxxxxx; si-list@free=
lists.org; si-list@xxxxxxxxxxxxx=0ACc: yafei_bi@xxxxxxxxx=0ASent: Tuesday, =
November 28, 2006 11:14:21 PM=0ASubject: [SI-LIST] Re: ESD simulations=0A=
=0AThanks for all responses,=0ASrivats Partha,=0AI agree with you. If we ha=
ve to design ESD protection for a circuit, we need to do get the characteri=
stics=0Ain those regions and that helps in optimizing the protection circui=
t parameters. If I'm wrong please correct it.=0ABut since the I/O pads does=
have the ESD protection circuits, we can still simulate them using HSPICE.=
=0AAs the protection devices responds to the ESD pulses, we may need to fi=
nd whether they did the =0Acorrect job (How to quantify it?, Thats exactly=
my question). =0AAs per (A Chip-level Electrostatic Discharge Simulation S=
trategy) paper, they suggest to check the voltage at the nodes of clamping =
paths, whether they exceeded the threshold (I don't know what value we can =
assume). =0AI feel from any pin to any pin the resistance should be within =
some threshold during ESD (HBM/MM/CDM)=0A(I don't know how to have a reason=
able value, probably its given for a technology from vendors for their I/Os=
).=0A=0A=0AYafei Bi,=0AActually we have the model files containing ESD effe=
cts. But whats the parameter we can look to tell,=0Awhether it is passed/fa=
iled. Also test modes like PS,PD,NS,ND PALL,NALL,PDS,NDS PC,NC tells how =
can we test after manufacturing.=0ABut I need before silicon, how can we ge=
t the ESD performance for whole chip (I/O pads + Package effects), probably=
not CDM now, =0Aas core logic is under design phase.=0A=0ARegards=0ACanes=
=0A=0AFrom: Srivats Partha <vats123@xxxxxxxxx>=0A=0AHello ppl=0AI feel hspi=
ce wll not allow you to simulate the ESD compliance of a I/O pad.The reason=
being HSPICE will not simulate a MOSFET beyond the saturation region. Usin=
g HSPICE only the linear and saturation regions of a MOSFET can be simulate=
d. But to verify the ESD complaince MOSFET characteristics beyond satur=
ation in break down and snap back needs to be studied. The lateral PNP BJT =
formed after the MOSFET breakdown needs to be studied. I am not sure if the=
re is a method to study this unless yu do the simulations with a MOSFET and=
a PNP transistor connected. You may also have to model the current source=
which depicts the Avalanche characteristics. Thats how we are looking to =
study the ESD characteristics in our lab. I hope my explanation is on the r=
ight track. Else you might have to use simulators which study MOSFET behav=
ior in the high current , voltage region. I wud very interested to know if =
there are other methods to do this.=0A=0A=0A=0AFrom: Yafei Bi <yafei_bi@yah=
oo.com>=0A=0A=0Aif you have the device model for the ESD protection devices=
/network, then you =0Acan build the test benches for ESD event(HBM, CBM etc=
.), and simulate ESD =0Aevent/compliance in HSpice. That will give you some=
idea on whether the I/O =0Adesign can meet the ESD requirement or not.=0AI=
f you don't have ESD device model, then you have to use T-CAD to generate t=
he I-V characteristic =0Aof the protection devices. Hopely you can do the s=
ame experiment on the device and =0Asee the difference.Eventually, ESD test=
on silicon is the final proof.=0Abest,=0AYafei=0A=0A=0A=0A=0A=0A=0A=0A____=
______________________________________________=0ADo You Yahoo!?=0ATired of =
spam? Yahoo! Mail has the best spam protection around =0Ahttp://mail.yahoo=
.com =0A------------------------------------------------------------------=
=0ATo unsubscribe from si-list:=0Asi-list-request@xxxxxxxxxxxxx with 'unsub=
scribe' in the Subject field=0A=0Aor to administer your membership from a w=
eb page, go to:=0A//www.freelists.org/webpage/si-list=0A=0AFor help:=
=0Asi-list-request@xxxxxxxxxxxxx with 'help' in the Subject field=0A=0AList=
FAQ wiki page is located at:=0A http://si-list.org/wiki/wik=
i.pl?Si-List_FAQ=0A=0AList technical documents are available at:=0A =
http://www.si-list.org=0A=0AList archives are viewable at: =0A =
//www.freelists.org/archives/si-list=0Aor at our remote archive=
s:=0A http://groups.yahoo.com/group/si-list/messages=0AOld (prior to=
June 6, 2001) list archives are viewable at:=0A http://www.qsl.net=
/wb6tpu=0A =0A=0A=0A=0A=0A=0A=0A =0A______________________________________=
______________________________________________=0AYahoo! Music Unlimited=0AA=
ccess over 1 million songs.=0Ahttp://music.yahoo.com/unlimited
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
