[SI-LIST] Re: Designing PCB Stackups

  • From: "DAVID CUTHBERT" <telegrapher9@xxxxxxxxx>
  • To: "codymiller@xxxxxxxxxx" <codymiller@xxxxxxxxxx>
  • Date: Thu, 11 Dec 2008 07:27:03 -0700

Hi Cody,
ask five engineers what stack-up to use and you'll get five different
answers. It seems to me that this is still treated as a black art with pure
empiricism thrown in. It doesn't have to be this way. By defining or
specifying the desired characteristics a suitable stack-up will almost
design itself. Characteristics such as Z0 tolerance will drive trace width
given the claimed variability of the PCB vendor's process. The required
power bus impedance will drive the power plane(s) spacing and location
within the board.

I use SPICE to model power planes and SONNET LITE to model traces.

   Dave Cuthbert


On 12/10/08, codymiller@xxxxxxxxxx <codymiller@xxxxxxxxxx> wrote:
>
> All,
>
> I have a general question regarding PCB stackup design. I am evaluating
> how we design our pcb stackups in our group now and I would like to put
> a procedure together or a set of rules of thumb to properly design a
> stackup. I would like the procedure to ask all the right questions up
> front.
>
> One question that came up is do PCB designers typically design with
> vendor specific materials in mind or do they design with generic prepreg
> and core materials. I see some pros and cons to both. What is typical in
> the industry.
>
> Any advice would be appreciated as well as if you know of any
> papers/resources on the web that could be helpful.
>
> Thanks,
> Cody
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