[SI-LIST] Re: Analog & Digital Grounds

  • From: "Charles Sweeney" <charles.sweeney@xxxxxxxxxxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 12 Oct 2009 11:07:13 +0100

To a large extent the idea of separating analogue and digital grounds comes
from the chip suppliers themselves. E.g. many Analog Devices datasheets show
separate grounds connected together under the device, although some show one
plane.

However I agree with the one plane idea if digital ground currents can be
kept away from analogue parts.

Regards
Charles

> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of
> steve weir
> Sent: 12 October 2009 01:42
> To: Lee Ritchey
> Cc: Chris Adam; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Analog & Digital Grounds
> 
> One set of common on the PCB with an appropriate component and trace
> placement / restriction plan is by far the most likely way to stay out
> of trouble.  In most designs one contiguous common gets the job done
> with the benefit of no surprise side effects.
> 
> It should be remembered however that the IC package is just a microcosm
> of the greater packaging system.  Given a sufficiently demanding
> requirement for I*R drop and di/dt*L drop isolation from aggressors the
> die, the IC package, PCB, or even system returns may require power
> and/or return separation.  Where people routinely get into trouble with
> this is the sneak paths. First the EMI can go to hell, and second the
> noise isolation can go to hell.  Isolating commons has a lot in common
> with ferrite beads.  It is a powerful tool that has lots of side effects
> that can be worse than the cure.  Moating, like ferrite beads should be
> used only when justified, and when justified should be applied with
> great care and thorough analysis.
> 
> Best Regards,
> 
> 
> Steve.
> 
> Lee Ritchey wrote:
> > Chris,
> >
> > Good question.  I've never separated analog and digital grounds.  That
may
> > sound pretty strong, but it is true for 2000+ designs.
> >
> > I think the recommendation to separate analog and digital ground stems
from
> > the fact that mixed signal parts often are equipped with both type of
> > ground pins.  This is not done so you have to design two separate
grounds
> > in the PCB, but rather so the two internal circuits don't share the same
> > ground path out of the package.  This is vital for A/D and D/A
converters
> > and assorted video circuits.  If not done, the "ground bounce" when the
> > digital circuits switch is coupled into the analog circuits which
usually
> > are working with very small signals or small changes in signal value.
A
> > ground bounce spike that would not disturb a digital circuit can totally
> > disable the analog function.
> >
> > Sometimes the same issue applies to Vdd.
> >
> > Lee Ritchey
> >
> >
> >
> >> [Original Message]
> >> From: Chris Adam <chris.adamsipi@xxxxxxxxx>
> >> To: <si-list@xxxxxxxxxxxxx>
> >> Date: 10/9/2009 3:53:48 PM
> >> Subject: [SI-LIST] Re: Analog & Digital Grounds
> >>
> >> Thanks Lee and all those who offered valuable suggestions offline.
> >> When do you really care to separate analog and digital grounds ? I see
> >>
> > some
> >
> >> transceiver vendors recommend splitting the grounds while others don't.
> >>
> >> Thanks,
> >> - Chris.
> >>
> >>
> >>
> >>
> >> On Fri, Oct 9, 2009 at 8:29 AM, Lee Ritchey
> >>
> > <leeritchey@xxxxxxxxxxxxx>wrote:
> >
> >>> First of all, there is no sacred rule that analog ground and digital
> >>>
> > ground
> >
> >>> must be separate.  Who knows where that came from.  Use only one
ground
> >>> plane and manage the current flows so that digital ground currents
don't
> >>> flow under the area where the analog circuits are situated.  It's
pretty
> >>> easy to do in most cases.
> >>>
> >>>
> >>>
> >>>
> >>>> [Original Message]
> >>>> From: Chris Adam <chris.adamsipi@xxxxxxxxx>
> >>>> To: <si-list@xxxxxxxxxxxxx>
> >>>> Date: 10/8/2009 5:47:35 PM
> >>>> Subject: [SI-LIST] Analog & Digital Grounds
> >>>>
> >>>>
> >>>  > I am working on a PCB design where number of layers is limited to 4
> >>>
> > to
> >
> >>>> reduce cost. As opposed to the regular 'sacred rule', analog and
> >>>>
> > digital
> >
> >>>> grounds are not separated though the respective VDDs are isolated. I
> >>>>
> > am
> >
> >>>> particularly concerned that the merged ground is  also a return path
> >>>>
> > for
> >
> >>>> DDR2 signals.   I would like to see how much noise does this ground
> >>>>
> >>> merging
> >>>
> >>>> will introduce in sensitive power supply nodes such as for PLL and
> >>>>
> > CDR.
> >
> >>> What
> >>>
> >>>> would be the appropriate simulation set up for this ? I am thinking
of
> >>>> multiport s-parameters, transfer impedance etc.  I would appreciate
if
> >>>>
> >>> any
> >>>
> >>>> one shares his/her experience, thoughts and insights in this type of
> >>>> analysis.
> >>>>
> >>>> - Chris
> >>>>
> >>>>
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> 
> --
> Steve Weir
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