[SI-LIST] Re: capacitor impedance in time domain
- From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Sat, 29 Jan 2005 22:11:30 -0800
Hello group_delay,
A fast CMOS driver does NOT see the capacitor that is at the end
of a T-line several inches away during its transitions. It sees
the T-line impedance, which initially looks like a resistor, (while
the signal is traveling down the line and back to the driver).
The shape of the reflected signal will depend on the capacitive
load, but a fast driver will be done switching usually way before
the reflection arrives back to it.
Of course, the situation can change and get mode complicated
if your T-line is relatively short, and/or when your driver
is switching multiple times while the first) signal is still
traveling down and back (ISI effects).
Arpad
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=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
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-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of group_delay
Sent: Saturday, January 29, 2005 9:24 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: capacitor impedance in time domain
Hi Peter,
Thanks for the very insightful way of looking at the problem and
effectively solving it! It was actually not a homework problem. I am
doing a thesis on IC design and wanted to find out about the capability
of cmos buffers to drive capacitive loads, and my knowledge of tlines is
a bit rusty...been a while since my undergrad days...
thanks again!
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