[SI-LIST] Re: Question on SI measurement/validation without receiver access
- From: Alan Hilton-Nickel <alan@xxxxxxxxxxxxxxxxx>
- To: arsenault_brian@xxxxxxx
- Date: Wed, 29 Sep 2004 19:22:50 -0700
Hi Brian,
You're getting some good suggestions so far. Here are two more.
1. For unshared signals, I've designed test pads that can be used for
initial validation. The test pads are located beyond the bga pin, but as
close to the package as possible to minimize the effect of the stub. You
can simulate the line including the stub and compare to measurements.
Before production, spin the board to remove the test points.
2. Another technique I've seen is to carefully grind down the edge of
the memory package to expose the lead frame. Probe the signal on the
lead frame.
Alan Hilton-Nickel
arsenault, brian wrote:
>Folks...
>
>I'm looking for some suggestions and ideas on how to perform SI measurements
>and correlate them to simulations when you don't have access to the receiver
>pin.
>
>For example, one of our designs is looking at back-to-back mounting of DDR-2
>memory chips, and based on the spacing of the board, the vias close to the
>receivers (the RAM's, when a read operation takes place) will not be
>accessible. The same thing would apply to probing signals at a receiver
>that is using blind and buried vias.
>
>Traditionally, all of our technology has utilized only through-vias, and we
>have been able to probe directly on the pins of the receivers if a via was
>not located very close by. As we're moving forward, it's apparent that we
>need to find a better way to both show the designer that his/her design will
>work, and for the SI group to correlate their simulations to measurements.
>
>I'm aware that building a test card to validate the buffers is one way to
>go, but in these times, we are trying to minimize extra costs.
>
>Thanks...
>
>Brian
>
>
>Brian Arsenault
>Principal HW Engineer
>EMC Corporation
>Hopkinton, MA
>
>
>
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