[SI-LIST] Re: Question on SI measurement/validation without receiver access
- From: "Gary Otonari" <garyo@xxxxxxxxxxxx>
- To: <arsenault_brian@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Wed, 29 Sep 2004 15:03:23 -0700
Given the limitations (no access on the board, no custom test board),
one possible way to measure the signal lines would be to de-cap the
devices and probe inside the package. Obviously, finding a probe pad
can be a problem, and you need to be careful about how you interpret
these measurements for correlation to your sims, but we have been
successful probing devices in this way. (SHAMELESS PLUG)
-- Gary Otonari, GigaTest Labs
------------------------------------------------------------------------
------------
Attend the GTL Signal Integrity University in Sunnyvale, CA - November
8-16
GTL 122 - Fundamental Principles of Signal Integrity
GTL 250 - High Speed Board Design
GigaTest Labs
134 South Wolfe Road * Sunnyvale, CA * 94086
408.524.2700
www.gigatest.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of arsenault, brian
Sent: Wednesday, September 29, 2004 8:02 AM
To: 'si-list@xxxxxxxxxxxxx'
Subject: [SI-LIST] Question on SI measurement/validation without
receiver access
Folks...
I'm looking for some suggestions and ideas on how to perform SI
measurements
and correlate them to simulations when you don't have access to the
receiver
pin.
For example, one of our designs is looking at back-to-back mounting of
DDR-2
memory chips, and based on the spacing of the board, the vias close to
the
receivers (the RAM's, when a read operation takes place) will not be
accessible. The same thing would apply to probing signals at a receiver
that is using blind and buried vias.
Traditionally, all of our technology has utilized only through-vias, and
we
have been able to probe directly on the pins of the receivers if a via
was
not located very close by. As we're moving forward, it's apparent that
we
need to find a better way to both show the designer that his/her design
will
work, and for the SI group to correlate their simulations to
measurements.
I'm aware that building a test card to validate the buffers is one way
to
go, but in these times, we are trying to minimize extra costs.
Thanks...
Brian
Brian Arsenault
Principal HW Engineer
EMC Corporation
Hopkinton, MA
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
