[SI-LIST] Re: Question on SI measurement/validation without receiver access

  • From: "lgreen" <lgreen22@xxxxxxxxxxxxxx>
  • To: <arsenault_brian@xxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 29 Sep 2004 12:11:44 -0700

Hi, Brian,

There are a couple of ways to tackle this.

1) In the SI simulation, model the probe loading at the place the probe is
actually connected during system testing.  This needs to have the probe
model reasonably accurate (Zp).
2) Use SI simulation to predict the BER, and test the BER on the system.
This does not produce waveforms, but could be an automated pass/fail test.

Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@xxxxxxxxxxxxxx


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of arsenault, brian
Sent: Wednesday, September 29, 2004 8:02 AM
To: 'si-list@xxxxxxxxxxxxx'
Subject: [SI-LIST] Question on SI measurement/validation without receiver
access

Folks...

I'm looking for some suggestions and ideas on how to perform SI measurements
and correlate them to simulations when you don't have access to the receiver
pin.

For example, one of our designs is looking at back-to-back mounting of DDR-2
memory chips, and based on the spacing of the board, the vias close to the
receivers (the RAM's, when a read operation takes place) will not be
accessible.  The same thing would apply to probing signals at a receiver
that is using blind and buried vias.

Traditionally, all of our technology has utilized only through-vias, and we
have been able to probe directly on the pins of the receivers if a via was
not located very close by.  As we're moving forward, it's apparent that we
need to find a better way to both show the designer that his/her design will
work, and for the SI group to correlate their simulations to measurements.

I'm aware that building a test card to validate the buffers is one way to
go, but in these times, we are trying to minimize extra costs.

Thanks...

Brian


Brian Arsenault
Principal HW Engineer
EMC Corporation
Hopkinton, MA



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