[SI-LIST] Re: On a different note ....
- From: Dan Bostan <dbostan@xxxxxxxxx>
- To: twesterh@xxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 23 Sep 2004 22:16:37 -0700 (PDT)
Todd,
I think there are two platforms that may do the job
for you:
1. The Cadence Allegro platform, including Cadence
Concept for schematic capture, Allegro for PCB design
and constraint management and Spectraquest for SI.
2. Even better, the Mentor Expedition flow, including
ICX for SI and Tau for timing analysis.
I think combinations of the two are also possible, but
going one way or another is a better choice.
If you would be evaluating these flows, I think the
best way is to get a demo for a couple of days/weeks
of both and see which one you feel most comfortable
with.
My two cents...
/dan
--- "Todd Westerhoff (twesterh)" <twesterh@xxxxxxxxx>
wrote:
> What techniques are people using to combine the
> results of static timing and
> signal integrity analysis for closing timing at the
> board/system level?
>
> This is a question I've asked a few times before,
> usually with mixed
> responses. Because the choices for board-level
> static timing tools are
> relatively few, I'm curious as to which tools are
> used productively, and
> how.
>
> Replies on and off the list are welcome.
>
> Thanks,
>
> Todd.
>
> Todd Westerhoff
> High Speed Design Specialist
> Cisco Systems
> 1414 Massachusetts Ave - Boxboro, MA - 01719
> email:twesterh@xxxxxxxxx
> ph: 978-936-2149
> ============================================
>
> "Always do right.
> This will gratify some people and astonish the
> rest."
>
> - Mark Twain
>
>
>
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