[SI-LIST] Re: Ground, the preferred reference plane

  • From: Chris Cheng <chris.cheng@xxxxxxxxxxxx>
  • To: "'Lum Wee Mei'" <lweemei@xxxxxxxxxx>,Chris Cheng <chris.cheng@xxxxxxxxxxxx>
  • Date: Wed, 11 Dec 2002 15:36:45 -0800

Someone pointed out to me that I have confused the VCC in ECL as the -ve
power. Actually, it should be the Gnd. But my point remains the same,
whatever the open drain/emitter driver tied to will be the prefer reference
plane. Not necessary the ground plane.

-----Original Message-----
From: Lum Wee Mei [mailto:lweemei@xxxxxxxxxx]
Sent: Wednesday, December 11, 2002 3:28 PM
To: chris.cheng@xxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: Ground, the preferred reference plane


Chris,

Thanks for pointing this out. It made me recall a seminar some years back by
A.Cantoni. In his presentation, he too highlighted which reference plane
should
be the preferenced one.

Regards,
Wee Mei

Chris Cheng wrote:

> Actually there are definite preference on reference plane depending on
which
> I/O technology you choose.
> For those old enough to worked on the original ECL (which I am not), the
> prefered reference is the -ve plane not the ground plane. There are a lot
of
> open drain I/O's (GTL, ECL to name a few) where the prefer return is the
> voltage the driver's source is tied to. It just happened when Bill Gunning
> started working on GTL he chose to use open drain pull down to ground (to
> save power) and from that point on most of the computers in this world
start
> using GTL i/o and thus it makes sense to use ground plane as a reference
for
> i/o. Most of the currently so called PECL circuits are shifted up open
> emitters and technically they should be referenced to the power plane
rather
> than ground for their return. We are just looking the other way and
assuming
> they are perfect differential signals and thus only need to reference
> themselves (+ve vs. -ve), in reality that is not completely ture.
>
> -----Original Message-----
> From: Loyer, Jeff [mailto:jeff.loyer@xxxxxxxxx]
> Sent: Wednesday, December 11, 2002 12:49 PM
> To: Anand.Kuriakose@xxxxxxx
> Cc: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Ground, the preferred reference plane
>
> This has been discussed in great length in this forum.  The archives =
> should have tons of information on it. =20
>
> My short take: the most prevalant cause of problems is changing the =
> reference plane without providing a suitable means for the return =
> current to transition between the planes.  There is much question about =
> what a "suitable means" is - at what frequencies do "stitching caps" =
> become useless, for instance. =20
>
> Since most chips have the signals referenced to ground internally, it is =
> a safer thing to have your signals likewise referenced to ground =
> externally.  This generally applies to cards, also.
>
> In short, it is possible to reference your signals to any plane, but =
> using ground as the reference plane is a safer bet.  An exception might =
> be if a chip specified that their signals were referenced to a power =
> plane, but I haven't seen this.
>
> Jeff Loyer
>
> -----Original Message-----
> From: Kuriakose, Anand [mailto:Anand.Kuriakose@xxxxxxx]
> Sent: Wednesday, December 11, 2002 12:25 AM
> To: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] Ground, the preferred reference plane
>
> Hi All,
>
> In "High Speed Digital System Design" by Stephen Hall, it is mentioned  =
> that
> the ground-referenced signals have cleaner signal integrity when =
> compared to
> power-referenced signals.=20
>
> Chipset design guides (not all) also recommend to have the high speed
> signals like processor signals routed over ground plane rather than over
> power plane. Also similar statements are made in a few other docs.
>
> I'd like to understand how does it improve the signal integrity of the
> signal when routed over GND plane rather than over power plane. In
> otherwords, what makes GND plane the preffered reference plane?
>
> One other point is that when signals are routed over power planes, the
> return current can get back to where it started without passing through =
> any
> decoupling caps, making the return loop smaller (assuming that signals =
> do
> not cross splits in the plane and no return path discontinuity due to =
> layer
> changes). However, if the same signal is routed over GND plane, the =
> return
> current will have to pass through a decoupling cap to complete the loop.
> Correct me if i am wrong in my above point.=20
>
> Regards,
> Anand.
>
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