[SI-LIST] Re: Ground, the preferred reference plane

From: "Scott McMorrow" <scott@xxxxxxxxxxxxx>
To: chris.cheng@xxxxxxxxxxxx
Date: Thu, 12 Dec 2002 16:42:33 -0800
Jeremy,

I would absolutely agree with Chris.  There is no time correlation at 
the receivers between VTT, VDDQ and VREF.  Although all are created off 
of the same supply, VDDQ, any noise  fluctuations are delayed in time 
and are isolated by both the generation circuits, voltage dividers and 
the physical propagation delays. Differential cancelation of the common 
mode noise components generated within each receiving device can occur, 
but externally generated common mode noise cannot be canceled, since it 
is uncorrelated between each source.

regards,

scott

-- 
Scott McMorrow
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com



Chris Cheng wrote:

>No there is no confusion. Even though the VTT is generated by the using
>VDDQ/2 as reference to the voltage regulator any high speed changes on VTT
>will not be propagate back to VDDQ and vice versa. They are just DC tracking
>each other but AC isolated.
>
>-----Original Message-----
>From: Jeremy Plunkett [mailto:jeremy@xxxxxxxxxxxxxxx]
>Sent: Thursday, December 12, 2002 3:47 PM
>To: chris.cheng@xxxxxxxxxxxx
>Cc: si-list@xxxxxxxxxxxxx
>Subject: RE: [SI-LIST] Re: Ground, the preferred reference plane
>
>
>Hi Chris,
>I think you are mixing up Vref and Vtt...Vref is the threshold reference
>provided to each DDR DIMM and controller ASIC, the only current drawn on it
>is leakage from the input comparators.  Therefore Vref is typically
>generated by a voltage divider off of VDDQ as close as possible to the chip
>it is supplying, and the number of resistors required is quite reasonable.
>
>Vtt on the other hand is the termination supply for all the DDR signals and
>must source and sink substantial amounts of current.  This requires a DC/DC
>converter, but still the VTT should be set up to track the VDDQ voltage to a
>tight tolerance by using a voltage divider from VDDQ(suitably filtered) as
>the reference voltage for the regulator.
>
>regards,
>Jeremy
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx
>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Cheng
>Sent: Thursday, December 12, 2002 1:48 PM
>Cc: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: Ground, the preferred reference plane
>
>
>
>100% agree but in reality, a lot of PC board doesn't have enough space to
>fit so many rpack's. Take a look at most of the reference designs for PC
>chipsets, most of them call out generating vref with a DC/DC converter and
>terminate with a single resistor.
>
>-----Original Message-----
>From: Vinu Arumugham [mailto:vinu@xxxxxxxxx]
>Sent: Wednesday, December 11, 2002 11:55 PM
>To: chris.cheng@xxxxxxxxxxxx
>Cc: si-list@xxxxxxxxxxxxx
>Subject: Re: [SI-LIST] Re: Ground, the preferred reference plane
>
>
>
>
>Chris Cheng wrote:
>
>  
>
>>Take an example of DDR in most PC design. The vref on receivers is
>>    
>>
>basically
>  
>
>>the VTT which usually is generated from an external DC/DC converter that
>>generates VDDQ/2 and is completely isolated from the driver VDDQ. 
>>
>>    
>>
>That does not sound like a good thing...
>The receiver Vref should be driver Vddq/2. We usually generate it with a 
>resistor divider from driver Vddq.
>This way, Vref will track Vddq better...
>
>Thanks,
>Vinu
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References:
- [SI-LIST] Re: Ground, the preferred reference plane
  - From: Chris Cheng
[SI-LIST] Re: Ground, the preferred reference plane

Other related posts:
