[SI-LIST] Re: Ground, the preferred reference plane

  • From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
  • To: <Anand.Kuriakose@xxxxxxx>
  • Date: Wed, 11 Dec 2002 12:49:11 -0800

This has been discussed in great length in this forum.  The archives =
should have tons of information on it. =20

My short take: the most prevalant cause of problems is changing the =
reference plane without providing a suitable means for the return =
current to transition between the planes.  There is much question about =
what a "suitable means" is - at what frequencies do "stitching caps" =
become useless, for instance. =20

Since most chips have the signals referenced to ground internally, it is =
a safer thing to have your signals likewise referenced to ground =
externally.  This generally applies to cards, also.

In short, it is possible to reference your signals to any plane, but =
using ground as the reference plane is a safer bet.  An exception might =
be if a chip specified that their signals were referenced to a power =
plane, but I haven't seen this.

Jeff Loyer



-----Original Message-----
From: Kuriakose, Anand [mailto:Anand.Kuriakose@xxxxxxx]
Sent: Wednesday, December 11, 2002 12:25 AM
To: 'si-list@xxxxxxxxxxxxx'
Subject: [SI-LIST] Ground, the preferred reference plane



Hi All,

In "High Speed Digital System Design" by Stephen Hall, it is mentioned  =
that
the ground-referenced signals have cleaner signal integrity when =
compared to
power-referenced signals.=20

Chipset design guides (not all) also recommend to have the high speed
signals like processor signals routed over ground plane rather than over
power plane. Also similar statements are made in a few other docs.

I'd like to understand how does it improve the signal integrity of the
signal when routed over GND plane rather than over power plane. In
otherwords, what makes GND plane the preffered reference plane?

One other point is that when signals are routed over power planes, the
return current can get back to where it started without passing through =
any
decoupling caps, making the return loop smaller (assuming that signals =
do
not cross splits in the plane and no return path discontinuity due to =
layer
changes). However, if the same signal is routed over GND plane, the =
return
current will have to pass through a decoupling cap to complete the loop.
Correct me if i am wrong in my above point.=20

Regards,
Anand.









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