[SI-LIST] Re: Ferrite bead question
- From: Eric Goodill <ericg@xxxxxxxxxxx>
- To: kfrobinson@xxxxxxxxxx
- Date: Mon, 10 Apr 2006 12:11:39 -0700
Ken,
Yeah, that's pretty much exactly what I meant by "pick a probable
maximum frequency," but I didn't say that in my post. Sorry.
-Eric
kfrobinson@xxxxxxxxxx wrote:
> Eric,
> The frequency components in a digital system can be estimated from DC to
> .35/(rise time). The IC manufactures do give 10-90 rise time. Pick the
> fastest rise time IC in your system.
> Ken
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Eric Goodill
> Sent: Monday, April 10, 2006 12:16 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Ferrite bead question
>
> Howdy,
> One thing I've never understood about designing the frequency response
> of a power delivery system is what are the frequency requirements? That
> is, where does the vendor give me the spectrum of the current demand for
> the part? They don't (I'm skipping over they it'd be tough). So the only
> solution I can see is to pick a probable maximum frequency and say from
> DC to that frequency we need less than X ohms impedance based on some
> assumptions about the peak current needs (related to lack of current
> spectrum). This is probably over designing, but I don't have any other
> data to use. Do others feel the same way?
>
> -Eric
>
> Scott McMorrow wrote:
>
>>Joel,
>>I think Lee is being a little bit black and white, but not without
>>good reason.. Whether or not ferrites "work" in a power filtering
>>design is a matter of whether the engineering was performed. What I
>>think Lee often sees are systems where no engineering has gone into
>>the design of ferrite, and they have been thrown into a circuit
>>without thought. Often because "that's the way we've always done it"
>>or "that's that way the competitors do it" or because "that's the only
>
>
>>ferrite we have in our parts system." The inductance of a ferrite can
>
>
>>interact with the power system and capacitors to form a pretty nasty
>>resonance. This resonance often sits in the low frequency region,
>>around the VRM output transition region, and has a strong tendency to
>>cause peaking in the 100 kHz to 1 MHz range. This peaking can cause
>>noise modulation of the Serdes, which Lee has often observed. If the
>>PCB power delivery network has a lower impedance in the frequencies
>>that affect the Serdes, than they ferrite filter does, then shorting
>>the ferrite will help. But if a ferrite filter network is correctly
>>designed, it is well matched and does not cause peaking.
>>
>>Whether or not noise injected into a Serdes affects it's output is a
>>function of the internal PLL/DLL design. This is hardly ever
>>specified, but can be measured.
>>
>>Scott
>>
>>Scott McMorrow
>>Teraspeed Consulting Group LLC
>>121 North River Drive
>>Narragansett, RI 02882
>>(401) 284-1827 Business
>>(401) 284-1840 Fax
>>
>>http://www.teraspeed.com
>>
>>Teraspeed(r) is the registered service mark of Teraspeed Consulting
>>Group LLC
>
>
> [snipped off the reset of the thread]
>
>
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