[SI-LIST] Re: Ferrite bead question

  • From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
  • To: "Istvan Novak - Board Design Technology" <Istvan.Novak@xxxxxxx>
  • Date: Tue, 11 Apr 2006 13:15:32 -0700

Istvan,

I'd agree with you about some authors of the applications notes not knowing
the user environment if I had not witnessed IC manufacturer's applications
engineers telling customers that they must follow the applications notes
exactly or they would not warrant proper operation.  Yes, I've been witness
to this dozens of times.  Under those conditions, the IC manufacturer is
under an obligation to do the proper engineering to support the notes, and,
by an large, that has not happened.  It is this class of applications note
that I think most grievously wrong.

  Imagine if a drug manufacturer published applicaitons notes of this
caliber.  Would you say they are not accountable if people are harmed by
their bad data?  I doubt it.  Why, then, do we exempt our suppliers from
such accountability?  Because no one had died?  There are occasions where
they do.

Instead of making excuses for poorly prepared component information, we
need to raise the bar.


> [Original Message]
> From: Istvan Novak - Board Design Technology <Istvan.Novak@xxxxxxx>
> To: <leeritchey@xxxxxxxxxxxxx>
> Cc: Joel Brown <joel@xxxxxxxxxx>; Zhangkun <zhang_kun@xxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>
> Date: 4/11/2006 12:21:52 PM
> Subject: [SI-LIST] Re: Ferrite bead question
>
> Lee,
> To be fair to the people who write those application notes, they have to
> do it blindly: they have no way of knowing the details of the environment
> the chip goes into.
>
> In those cases, when the use of the ferrite bead is warranted, the purpose
> of the filter is to provide the necessary feed impedance at the filter's
> output
> AND to provide the necessary isolation between the filter's input and
> output.
> The necessary feed impedance at the output is something that the person
> writing the application note should be able to know.  The required
> isolation,
> however, depends not only on the filter, but also on the noise
> characteristics
> at the filter input.  This means that the necessary filter does depend
> on the
> circuit environment.  There are scenarios, as you pointed out, when there
> is no need for a separate filter; these are the cases when the noise
before
> the 'would-be' filter is low enough so that no additional attenuation is
> required AND the main rail's impedance is appropriate for directly
> connecting
> it to the 'filtered' device.  If, however, the main rail has more noise
> than
> what the 'filtered' device can live with, we have two choices:  we could
> lower the noise on the main rail, or we can use a filter.
>
> Devices, which come with a recommended extra filtering, are usually clock
> sources, clock buffers, SerDes analog circuitry.  The noise sensitivity
> of these
> analog pins may require a noise voltage allowance much lower than what
> a generic logic may need.  For instance, PLL supply points may be very
> sensitive
> to periodical disturbances around the loop cutoff frequency.  Sometimes
the
> noise should not be more than a few mV rms in that frequency range. 
> DC-DC converter output ripple could be more than this limit, and the
generic
> logic may be OK with it.  In such cases reducing the output ripple of the
> converter, though technically might be doable, would probably be more
> expensive than requiring a dedicated filtering to the lower-current
> analog point.
>
> You are correct in saying that many of these filters are not designed in a
> proper way.  One way of doing it properly would be to get the noise
> tolerance and feed-impedance requirement for the chip in question, instead
> of a recommended filter.  Based on the noise characteristics of the system
> that goes around the chip, the system designer should be able to determine
> whether a filter is needed, and if needed, should be able to design it.
>
> Regards,
>
> Istvan
>
>
>
>
>
> Lee Ritchey wrote:
>
> >Joel,
> >
> >
> >As others have observed, when the solution using a ferrite bead has been
> >engineered to satisfy the following set of conditions it is warranted and
> >helpful.
> >
> >1. There is a problem that needs fixing.
> >2. The proposed solution fixes the problem.
> >3. The proposed solution does not cause new problems.
> >4. The proposed solution is the best solution to the problem.
> >
> >When you apply this set of tests to the usual applications note
> >recommendation, it often fails test number 1.  The proponent has not
> >acertained that there is a problem and what it actually looks like.
> >
> >I put this question to the students in my  classes at UC Berkeley, nearly
> >always practicing engineers.  Can you show me an applications note with
> >analysis supporting the use of ferrite beads?  So far, there have been no
> >such examples.  I keep hoping, but know that most applications notes are
> >not prepared that way.  Soon as I find one, I'll report it in this forum
> >and show it in my classes- and give its author high praise for doing good
> >engineering.
> >
> >  More commonly, they are justified because "we have always done it this
> >way."  Further, there has usually not been any exhaustive testing to
insure
> >the solution is valid.  That is  in no way good engineering.  
> >
> >I'll accept a recommendation that is accompanied by supporting
engineering
> >analysis.  Less, seems to me to be guessing and that's a good way to get
in
> >trouble with modern e lectronic components.
> >
> >
> >
> >
> >  
> >
> >>[Original Message]
> >>From: Joel Brown <joel@xxxxxxxxxx>
> >>To: <leeritchey@xxxxxxxxxxxxx>
> >>Cc: Zhangkun <zhang_kun@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> >>Date: 4/10/2006 10:17:06 AM
> >>Subject: Re: [SI-LIST] Re: Ferrite bead question
> >>
> >>Lee,
> >>
> >>After reading the responses and giving some more thought to this, I 
> >>agree that in some situations the use of ferrite beads can be
detrimental.
> >>In the design I am currently working on, the ferrite beads are used 
> >>mostly on low speed I/O signals and DC power to ICs that are not
running 
> >>at very high speeds.
> >>The highest speed part is a 100 MHz PCI Express clock buffer, and the 
> >>manufacturer does recommend to use a ferrite bead.
> >>While I agree your statements have some merit, I find it problematic 
> >>that you seem to be saying ferrite beads only work by luck.
> >>Certainly there must be situations in which they can predictably be
used 
> >>to reduce noise.
> >>
> >>Regards - Joel
> >>
> >>
> >>
> >>Lee Ritchey wrote:
> >>    
> >>
> >>>Joel,
> >>>
> >>>I agree with all the respondents who have cautioned you on the use of
> >>>ferrite beads in the power leads of devices.  In all of the cases, I
> >>>      
> >>>
> >have
> >  
> >
> >>>investigated, ferrite beads have been used to treat a symptom rather
> >>>      
> >>>
> >than
> >  
> >
> >>>the problem.  The problem being that the power delivery system had too
> >>>      
> >>>
> >much
> >  
> >
> >>>noinse or ripple on it.
> >>>
> >>>Lately, I have seen many cases where placing a ferrite bead in the
power
> >>>lead of a device, very often the power lead of very high speed serdes,
> >>>      
> >>>
> >has
> >  
> >
> >>>made the part perform poorly or below spec.
> >>>
> >>>Yes, thousands of applications notes insist that ferrite beads be
> >>>      
> >>>
> >placed in
> >  
> >
> >>>the power leads and the applications engineers will demad you use them
> >>>      
> >>>
> >or
> >  
> >
> >>>they won't guarantee the circuit will work properly.  The other side of
> >>>that same coin is that when you ask if they will guarantee that the
> >>>      
> >>>
> >circuit
> >  
> >
> >>>will work properly if you follow the applications note exactly, the
> >>>      
> >>>
> >answer
> >  
> >
> >>>is still no!  The reason is that there has been no analysis to prove
> >>>      
> >>>
> >that
> >  
> >
> >>>the use of a ferrite bead is a good idea. 
> >>>
> >>> I have measured wavforms of a 3.12 GB/S serial link where the eye just
> >>>barely makes the minimum signal amplitude with the ferrite bead in
place
> >>>and has large amounts of margin when the ferrite bead is shorted out. 
> >>>This, even with the manufacturer's recommended capacitors attached. 
> >>>      
> >>>
> >This
> >  
> >
> >>>data was taken from a demo board supplied by the manufacturer who was
> >>>      
> >>>
> >not
> >  
> >
> >>>aware of the degradation caused by the ferrite bead.
> >>>
> >>>The right solution is to design a power delivery system with power
> >>>      
> >>>
> >supply
> >  
> >
> >>>noise within the limits of the circuits being supplied and this is not
> >>>      
> >>>
> >very
> >  
> >
> >>>difficult to do.
> >>>
> >>>I  have done the SI rule generation for three terabit routers with
> >>>thousands of 3.125 GB/S and 4.8 GB/S serial links in them and used no
> >>>ferrite beads in them any where and they worked to specification the
> >>>      
> >>>
> >first
> >  
> >
> >>>time wit hproper margins.  So maybe people who want you to use ferrite
> >>>beads should  be challenged with why they want you to add these parts.
> >>>
> >>>My fellow SI engineers call ferrite beads "voodoo" beads and "get
lucky"
> >>>beads for good reason.
> >>>
> >>>This is not likely to make the ferrite bead salesmen happy, I'm sure.
> >>>
> >>>
> >>>  
> >>>      
> >>>
> >>>>[Original Message]
> >>>>From: Zhangkun <zhang_kun@xxxxxxxxxx>
> >>>>To: <joel@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> >>>>Date: 4/10/2006 1:14:21 PM
> >>>>Subject: [SI-LIST] Re: Ferrite bead question
> >>>>
> >>>>Dear Joel
> >>>>
> >>>>As to my experience, it is not enough to select bead based on the P/N.
> >>>>    
> >>>>        
> >>>>
> >>>The decoupling circuit should be considered very carefully.
> >>>  
> >>>      
> >>>
> >>>>In several cases, we use beads and the noise become larger. The
> >>>>        
> >>>>
> >following
> >  
> >
> >>>>    
> >>>>        
> >>>>
> >>>element should be considered:
> >>>  
> >>>      
> >>>
> >>>>    1.The resonance between bead and capacitor.
> >>>>    2.The frequency span of the noise source.
> >>>>
> >>>>A simulation is suggested. It is very simple.
> >>>>
> >>>>Hope this is helpful
> >>>>
> >>>>Best Regards
> >>>>
> >>>>Zhangkun
> >>>>2006.4.10
> >>>>----- Original Message ----- 
> >>>>From: "Joel Brown" <joel@xxxxxxxxxx>
> >>>>To: <si-list@xxxxxxxxxxxxx>
> >>>>Sent: Saturday, April 08, 2006 2:33 AM
> >>>>Subject: [SI-LIST] Ferrite bead question
> >>>>
> >>>>
> >>>>    
> >>>>        
> >>>>
> >>>>>I often see recommendations in application notes for ferrite beads on
> >>>>>      
> >>>>>          
> >>>>>
> >>>DC 
> >>>  
> >>>      
> >>>
> >>>>>power lines. Sometimes a particular P/N is specified and sometimes
> >>>>>          
> >>>>>
> >just 
> >  
> >
> >>>>>an impedance is given.
> >>>>>Wouldn't I want to choose a ferrite bead that has the highest
> >>>>>          
> >>>>>
> >impedance 
> >  
> >
> >>>>>possible at the frequencies of interest, and that the current rating
> >>>>>      
> >>>>>          
> >>>>>
> >>>and 
> >>>  
> >>>      
> >>>
> >>>>>DC resistance are appropriate? Would the frequencies of interest be
> >>>>>          
> >>>>>
> >the 
> >  
> >
> >>>>>fundamental switching frequency of the part and possibly the 3rd and
> >>>>>      
> >>>>>          
> >>>>>
> >>>5th 
> >>>  
> >>>      
> >>>
> >>>>>harmonics?
> >>>>>Thanks - Joel
> >>>>>
> >>>>>
> >>>>>
> >>>>>
> >>>>>          
> >>>>>
> >  
> >
>
>
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