[SI-LIST] Re: Effects of overshoot/undershoot on long-term reliability
- From: Scott McMorrow <scott@xxxxxxxxxxxxx>
- To: weirsi@xxxxxxxxxx
- Date: Fri, 03 Mar 2006 11:29:35 -0500
Mikhail,
I concur with Steve. This should be treated as both an engineering and
a liability problem. From an engineering perspective, your design does
not meet the specifications. If it fails for this reason, it becomes a
liability problem. If I were in your position, my recommendation to
management would be to perform a redesign. (And I have been in this
position many times.) I would document the facts, state the case for
redesign with series resistors in a clear and succinct fashion, and
allow your management to make the final decision. If they decide not to
follow your recommendation, I would then reply with a memo that states
your objection to their decision.
The fact that the manufacturer's evaluation board does not meet their
own specifications is irrelevant. It may provide you with the necessary
leverage to obtain the actual overshoot specification from the device
manufacturer, or some monetary allowance to cover your cost of redesign,
but it is not a valid excuse if your design experiences failure due to
your neglect of following best engineering practices.
You are dealing with one engineering problem, overstress, which has two
causes. First, your memory driver is too strong and too fast. Second,
your receiver inputs at the DSP are not protected against long term
overshoot. Both are affected by process and device geometry. You are
guaranteed that as your design matures, newer memory devices will become
faster. This will increase your risk. There is also a good chance that
if your DSP is a high run rate part, it will also be cost-reduced by
producing it at a smaller geometry. Switchover to a smaller geometry
process may happen without your knowledge. In which case, you may begin
seeing failures in the future that you do not see today.
Good luck and happy engineering,
Scott
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC
steve weir wrote:
> Mikhail, will you have a warranty or liability problem if these
> things fail within a particular period of time? Will your company
> suffer loss of market if these things have a short life? If the
> answer is yes, then you are pretty much stuck doing the homework to
> first get a real answer out of ADI about what their parts can take
> compared to what you are banging them with.
>
> Personally, I would eat the redesign and sleep well at night knowing
> that the product wasn't a Challenger disaster waiting to happen.
>
> You might be able to get out of Dutch in the short term by applying
> cost with an Ohmega layer for the resistors.
>
> Steve.
> At 07:34 AM 3/3/2006, Mikhail Matusov wrote:
>
>> Dear experts,
>>
>> I designed a card based on the ADI TS201 TigerSHARC EZ-KIT evaluation board
>> schematics. The TS201 has 2.5V 3.3V-tolerant I/Os . On this board it is
>> directly connected to a 3.3V Micron SDRAM. Unfortunately, we had not
>> simulated this interface before going into the layout. When we did we found
>> that there is a huge overshoot on SDRAM read reaching almost 5V at the DSP
>> pins. Our SI subcontractor recommends adding series terminations at the
>> SDRAM pins. At this point it would mean major PCB redesign. I pulled an
>> EZ-KIT card and captured the read cycle to verify the simulation results and
>> found that the board behaves exactly as in simulation, i.e. the DSP chip is
>> constantly subjected to this huge overshoot. However, the board works fine.
>> So, I was wondering how I could estimate the risk of leaving the design as
>> is?
>>
>>
>> Thanks,
>> =======================
>> Mikhail Matusov
>> Hardware Design Engineer
>> Square Peg Communications
>> Tel.: +1 (613) 271-0044 ext.231
>> Fax: +1 (613) 271-3007
>> http://www.squarepeg.ca
>>
>>
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