So me, your approach is fine. I think you can potentially see a lot of improvement. In fact, as speeds get faster, I would contend this practice will be NECESSARY. -----Original Message----- From: Bill Reams [mailto:breams@xxxxxxxxxxxxxx] Sent: Wednesday, November 05, 2003 10:36 AM To: chris.mcgrath@xxxxxxxx Cc: 'Si-List' (E-mail) Subject: [SI-LIST] Re: EMC One thought I have is that we've already paid for the copper on all = layers. What I have been doing is getting boards routed properly (well, = I hope they're routed correctly). After routing is all done, checked, = verified, etc, I have the non-used areas filled if there are = power/ground vias available to attach the fill to. But I make certain to = keep back from areas with traces. On inner layers the "keep back from = traces" rule means all signal layers in the sandwich not just the layer = in question (don't want to screw up impedance). So, in a stack up that = has an inner structure like this: . . PLANE1 SIGNAL1 SIGNAL2 PLANE2 . . the fills on SIGNAL1 and SIGNAL2 are in areas that have no traces on = either SIGNAL1 or SIGNAL2. And the voltage that the fills attach to = would be chosen based on the some logic. For example, if PLANE1 is 3.3V = and PLANE2 is COMMON, then the fills on SIGNAL1 would attached be COMMON = while the fills on SIGNAL2 would be 3.3V. As I see it, the copper that I've already paid for is being put to use = and by adding some low inductance capacitors (albeit small capacitance = value of 100-200pF/sq.in.)I should get some (probably) minor improvement = at the cost of ~5-20 minutes of layout time. The manufacturing cost is = ~zero. So now a question for you: Does that make any sense or am I deluding = myself? -----Original Message----- From: Chris McGrath [mailto:chris.mcgrath@xxxxxxxx] Sent: Wednesday, 05 November, 2003 09:13 AM Cc: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: EMC Your point is well taken and in the example I stated the (theoretical) capacitance that we could expect is around 200 pF/sq.in. which is not negligible given the lower inductance. However, like most things this list discusses, the whole system plays a part in determining whether a design method is appropriate but I am glad to have a better understanding of the reasoning for having the ground fills. (I must admit, however, that the cost of passive components- especially on the order of a penny or less per component- is not a factor in most of our designs. To me, the greatest benefit to removing a passive component, especially capacitors, is that lowering the component count increases MTBF of the system.) While I realize that the theory makes sense for all layers, I am assuming that if ground fills are actually used that they are mainly done on the outside (top and bottom) layers and not on internal layers. From a thermal profiling and manufacturing perspective, filling up unused regions everywhere within a PCB can be a serious problem as the layer count increases (16+ layers). What are your thoughts? -Chris > -----Original Message----- > From: Chris Landrum x311 [mailto:clandrum@xxxxxxxxx]=3D20 > Sent: Wednesday, November 05, 2003 9:58 AM > To: Chris McGrath > Cc: si-list@xxxxxxxxxxxxx > Subject: RE: [SI-LIST] Re: EMC >=3D20 >=3D20 > You are correct is noticing the capacitance is small.... But=3D20 > don't forget, you are getting rid of much of the parasitic=3D20 > inductance that will cause resonance, as compared to an SMT=3D20 > or leaded cap. This parasitic inductance effectively causes=3D20 > your bypass cap to be AN INDUCTOR at any freq above 100MHz!!!=3D20 > In other words it is USELESS to your power sub-system. You=3D20 > might as well have not used it at all and saved your company=3D20 > the $0.001/brd. With the inner planer capacitor, it is much=3D20 > more effective at high frequency, albeit, it does not provide=3D20 > a lot of charge. It can make all the difference in the world=3D20 > at higher freq. >=3D20 > -----Original Message----- > From: Chris McGrath [mailto:chris.mcgrath@xxxxxxxx] > Sent: Wednesday, November 05, 2003 9:43 AM > Cc: si-list@xxxxxxxxxxxxx > Subject: [SI-LIST] Re: EMC >=3D20 >=3D20 > Given, say, a 10"x10" board with 5 mil dielectrics, the=3D20 > capacitance due to the ground fills would be extremely small,=3D20 > wouldn't they? =3D3D20 >=3D20 > I don't disagree that the fill method has less inductance,=3D20 > but I think that it would have little effective capacitance=3D20 > that would have a substantial impact on decoupling the=3D20 > devices due to the small copper area and the distance to the=3D20 > dielectric. From your description of the issue, it sounds=3D20 > like ground filling would be pretty far down the list of the=3D20 > EMI designer's bag of tricks. >=3D20 > -Chris >=3D20 >=3D20 > > -----Original Message----- > > From: Chris Landrum x311 [mailto:clandrum@xxxxxxxxx]=3D3D20 > > Sent: Wednesday, November 05, 2003 9:16 AM > > To: Chris McGrath > > Cc: si-list@xxxxxxxxxxxxx > > Subject: RE: [SI-LIST] Re: EMC > >=3D3D20 > >=3D3D20 > > Ground filling is useful to create inner layer=3D20 > capacitance=3D3D20 for the=3D20 > >power sub-system of the PCB. By filling GND on a=3D3D20 signal=3D20 > layer that=3D20 > >is directly adjacent to a PWR plane a=3D3D20 capacitor will be=3D20 > created. =3D20 > >This capacitor is often times=3D3D20 MUCH more effective at = providing=3D20 > >energy to components because=3D3D20 it is far less inductive=3D20 > than a normal=3D20 > >leaded or chip capacitor. =3D3D20 =3D3D20 > > EMI can be caused by an improperly designed power sub-system.=3D3D20 > > What can happen here is current gradients can be formed in=3D3D20 > > the PWR/GND planes that can effectively cause radiation=3D3D20 > > assuming there is an antenna nearby. Also of concern is VCC=3D3D20 > > and GND bounce. The plane capacitors formed can help avoid=3D3D20 > > this problem. > >=3D3D20 > > By ensuring that the chips are getting the proper energy such=3D3D20 > > that VCC and GND bounce do not occur, you are thereby=3D3D20 > > reducing the probability that EMI problems can be caused by=3D3D20 > > the power sub-system. > >=3D3D20 > > -----Original Message----- > > From: Chris McGrath [mailto:chris.mcgrath@xxxxxxxx] > > Sent: Wednesday, November 05, 2003 8:35 AM > > Cc: si-list@xxxxxxxxxxxxx > > Subject: [SI-LIST] Re: EMC > >=3D3D20 > >=3D3D20 > > The "ground filling" is a topic that has been discussed at my=3D3D20 > > company recently and I wanted to get the list's feedback on=3D3D20 > > why this is done. We never do ground filling on any layers=3D3D20 > > and the only reason that I have ever heard for it was to=3D3D20 > > reduce EMI, but given the disadvantages (increased thermal=3D3D20 > > profile, potential for crosstalk, PCB viewer and gerber=3D3D20 > > viewer complications, etc.) and the fact that I have never=3D3D20 > > been able to find data or any science to back up the EMI=3D3D20 > > argument, I don't see any benefit to ground filling on signal=3D3D20 > > layers. (Of note is that by using the term "ground filling",=3D3D20 > > I am not referring to "thieving" to equalize the copper=3D3D20 > > distribution to facilitate PCB fabrication.) > >=3D3D20 > > I am very interested in hearing feedback from any of you. > >=3D3D20 > > -Chris > >=3D3D20 > >=3D3D20 > > > -----Original Message----- > > > From: Suresh.K [mailto:sureshk@xxxxxxxxxxxxxx]=3D3D3D20 > > > Sent: Wednesday, November 05, 2003 2:54 AM > > > To: subramani > > > Cc: si-list@xxxxxxxxxxxxx > > > Subject: [SI-LIST] Re: EMC > > >=3D3D3D20 > > >=3D3D3D20 > > >=3D3D3D20 > > > Dear Sir, > > >=3D3D3D20 > > > According to your Board Stack you have two strip lines=3D20 > and=3D3D3D20 one=3D20 > > >=3D3D >=3D20 > > >assymmetrical dual stripline,but the two strip lines are=3D3D3D20 = =3D =3D3D20 > > bounded by=3D3D20 > > >one side power plane and Ground Plane on the other=3D3D3D20 =3D20 > side......=3D20 > > >=3D3D3D20 If you have both side ground plane reference for = the=3D20 > > >strip=3D3D3D20 lines ,you can route all the Impedance=3D20 > controlled signals=3D20 > > >on=3D3D3D20 Layer2 & layer8,because strip lines bounded by = ground=3D20 > > >planes=3D3D3D20 will be best layer for better signal=3D3D3D20 > > > integrity. > > >=3D3D3D20 > > > But now you have assymmetrical dual stripline bounded by=3D3D3D20 > > > ground planes,so I beleive that layer 5&6 may be better=3D3D3D20 > > > option for routing clock signals,which will useful for =3D return=3D3D3D20 > > > path, but you need to care of tandem=3D3D3D20 > > > pair of traces. > > >=3D3D3D20 > > > and regarding board power plane EMI,you can follow 20H = rule=3D3D3D20 > > > on layer2& layer9 power planes to reduce the power plane =3D EMI=3D3D3D20 > > > and Top & Bottom layers you are doing Ground fill, so I =3D think=3D3D3D20 > > > the device EMI will be controlled by the Ground fills. > > >=3D3D3D20 > > > Regards, > > > Suresh.K, > > > Vth EDA Lab, > > > C-DOT, > > > Bangalore-52. > > >=3D3D3D20 > > >=3D3D3D20 > > >=3D3D3D20 > > >=3D3D3D20 > > >=3D3D3D20 > > > On Wed, 5 Nov 2003, subramani wrote: > > >=3D3D3D20 > > > > Hello, > > > >=3D3D3D20 > > > > I am doing a board design. It has to pass stringent EMI tests. = =3D =3D3D > =3D3D3D20 > > > > Mine is a 10 layer board. > > > >=3D3D3D20 > > > > The board stack up is > > > > 1 TOP component, GND filling > > > > 2 Power > > > > 3 signal > > > > 4 GND filling > > > > 5 signal > > > > 6 Signal > > > > 7 GND filling > > > > 8 Signal > > > > 9 Power > > > > 10 Bottom Component, GND filling > > > >=3D3D3D20 > > > > The board has SDRAM operating at 100Mhz. Where should I=3D3D20 > > route the=3D3D3D20 > > > > clocks. Could anyone tell me about the ways and means = of=3D3D3D20 > > > reducing EMI.=3D3D3D20 > > > > The SDRAM is placed that is near to the edge of PCB. Will =3D it=3D3D20=3D20 > > > >cause=3D3D3D20 radiation. Is there a formula for keepout = distance. =3D =3D3D > =3D3D3D20 > > > > Regards > > > > Subramani > > > > Mistral > > > >=3D3D3D20 > > > >=3D3D3D20 > > > >=3D20 > ------------------------------------------------------------------ > > > > To unsubscribe from si-list: =3D20 > si-list-request@xxxxxxxxxxxxx with=3D20 > > > >'unsubscribe' in the=3D3D3D20 > > > Subject field > > > >=3D3D3D20 > > > > or to administer your membership from a web page, go=3D20 > to:=3D3D3D20 =3D3D20=3D20 > > > >//www.freelists.org/webpage/si-list > > > >=3D3D3D20 > > > > For help: > > > > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field = =3D =3D3D > =3D3D3D20 > > > > List archives are viewable at: =3D3D3D20 > > > > //www.freelists.org/archives/si-list > > > > or at our remote archives: > > > > http://groups.yahoo.com/group/si-list/messages > > > > Old (prior to June 6, 2001) list archives are viewable at: > > > > http://www.qsl.net/wb6tpu > > > > =3D3D3D20 > > > >=3D3D3D20 > > > >=3D3D3D20 > > >=3D3D3D20 > > > ------------------------------------------------------------------ > > > To unsubscribe from si-list: > > > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the=3D3D20 > > Subject field=3D3D20 > > >=3D3D3D20 or to administer your membership from a web page,=3D20 > go to:=3D3D3D20 =3D20 > > >//www.freelists.org/webpage/si-list > > >=3D3D3D20 > > > For help: > > >=3D3D3D20 > > > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject=3D20 > field =3D3D3D20 > > > List archives are viewable at: =3D3D3D20 > > > //www.freelists.org/archives/si-list > > > or at our remote archives: > > > http://groups.yahoo.com/group/si-list/messages=3D3D3D20 > > > Old (prior to June 6, 2001) list archives are viewable at: > > > http://www.qsl.net/wb6tpu > > > =3D3D3D20 > > >=3D3D3D20 > > ------------------------------------------------------------------ > > To unsubscribe from si-list: > > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the=3D20 > Subject field=3D20 > >=3D3D20 or to administer your membership from a web page, go = to:=3D3D20 > > //www.freelists.org/webpage/si-list > >=3D3D20 > > For help: > >=3D3D20 > > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field > >=3D3D20 > > List archives are viewable at: =3D3D20 > > //www.freelists.org/archives/si-list > > or at our remote archives: > > http://groups.yahoo.com/group/si-list/messages=3D3D20 > > Old (prior to June 6, 2001) list archives are viewable at: > > http://www.qsl.net/wb6tpu > > =3D3D20 > >=3D3D20 > ------------------------------------------------------------------ > To unsubscribe from si-list: > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field >=3D20 > or to administer your membership from a web page, go to:=3D20 > //www.freelists.org/webpage/si-list >=3D20 > For help: >=3D20 > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field >=3D20 > List archives are viewable at: =3D20 > //www.freelists.org/archives/si-list > or at our remote archives: > http://groups.yahoo.com/group/si-list/messages=3D20 > Old (prior to June 6, 2001) list archives are viewable at: > http://www.qsl.net/wb6tpu > =3D20 >=3D20 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: =20 //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages=20 Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu =20 ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu